(CGEN_MAIN_SCM): Add rtx-funcs.scm.
(cgen-arch): Pass $(mach) to cgen.sh.
* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
(SEM_BRANCH_INIT_EXTRACT): New macro.
(SEM_BRANCH_INIT): Add taken_p.
(TARGET_SEM_BRANCH_FINI): Provide default definition.
(SEM_BRANCH_FINI): Use it.
(SEM_INSN): Update.
* cgen-run.c (sim_resume): Handle tracing of last insn.
* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
* cgen-trace.c (current_abuf): New static global.
(trace_insn_init): Initialize it.
(trace_insn_fini): Use it.
(trace_insn): Set it.
* cgen.sh (arch case): Pass -m ${mach} to cgen.
* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
(@cpu@_emit_after): Ditto.
(simple @cpu@_engine_run_full): New local `pc'. Initialize semantic
labels if WITH_SEM_SWITCH_FULL.
* sim-model.c: Include bfd.h.
(sim_model_init): New function.
(sim_model_install): Record init fn.
* sim-model.h (MACH): New member bfd_name.
* sim-module.c (modules): Initialize model before scache.
[ChangeLog]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
(load_word): Call SIM_CORE_SIGNAL hook on error.
(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
starting. For exception dispatching, pass PC instead of NULL_CIA.
(decode_coproc): Use COP0_BADVADDR to store faulting address.
* sim-main.h (COP0_BADVADDR): Define.
(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* mips.igen (*): Replace memory-related SignalException* calls
with references to SIM_CORE_SIGNAL hook.
* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
fix.
* sim-main.c (*): Minor warning cleanups.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
* interp.c (sim_open): Add stub mn103002 cache control memory regions.
Set OPERATING_ENVIRONMENT on "stdeval1" board.
(mn10300_core_signal): New function to intercept memory errors.
(program_interrupt): New function to dispatch to exception vector
(mn10300_exception_*): New functions to snapshot pre/post exception
state.
* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
(SIM_ENGINE_HALT_HOOK): Do nothing.
(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
Various endianness and warning fixes.
* mn10300.igen (illegal): Call program_interrupt on error.
(break): Call program_interrupt on breakpoint
Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
merged in:
* dv-mn103int.c (mn103int_ioctl): New function for NMI
generation. (mn103int_finish): Install it as ioctl handler.
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
1998-12-24 Frank Ch. Eigler <fche@cygnus.com>
* dv-sockser.c (DEFAULT_TIMEOUT): Increase to 1 ms.
* nrun.c (main): Remain in simulation loop for traps and
exceptions when in operating environment mode.
(ui_loop_hook): New stub hook for standalone use.
* sim-events.c (sim_events_process): Call ui_loop_hook
periodically on CYGWIN host.
* sim-reason.c (sim_stop_reason): Return host signal numbers
to gdb on sim_stopped and sim_signalled cases.
* sim-engine.c (sim_engine_halt): Call SIM_CPU_EXCEPTION_SUSPEND
hook just before longjmp.
* sim-resume.c (sim_resume): Call SIM_CPU_EXCEPTION_RESUME
hook just before sim_engine_run.
* sim-n-core.h (sim_core_trace_M): Allay const warning.
* sim-trace.h (trace_generic): Ditto.
* sim-trace.c (trace_generic): Ditto.
* sim/fr30/ldres.cgs: New testcase.
* sim/fr30/stres.cgs: New testcase.
* sim/fr30/copop.cgs: New testcase.
* sim/fr30/copld.cgs: New testcase.
* sim/fr30/copst.cgs: New testcase.
* sim/fr30/copsv.cgs: New testcase.
* sim/fr30/nop.cgs: New testcase.
* sim/fr30/andccr.cgs: New testcase.
* sim/fr30/orccr.cgs: New testcase.
* sim/fr30/addsp.cgs: New testcase.
* sim/fr30/stilm.cgs: New testcase.
* sim/fr30/extsb.cgs: New testcase.
* sim/fr30/extub.cgs: New testcase.
* sim/fr30/extsh.cgs: New testcase.
* sim/fr30/extuh.cgs: New testcase.
* sim/fr30/enter.cgs: New testcase.
* sim/fr30/leave.cgs: New testcase.
* sim/fr30/xchb.cgs: New testcase.
* sim/fr30/dmovb.cgs: New testcase.
* sim/fr30/dmov.cgs: New testcase.
* sim/fr30/dmovh.cgs: New testcase.
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
* sim/fr30/ret.cgs: Add tests fir ret:d.
* sim/fr30/inte.cgs: New testcase.
* sim/fr30/reti.cgs: New testcase.
* sim/fr30/bra.cgs: New testcase.
* sim/fr30/bno.cgs: New testcase.
* sim/fr30/beq.cgs: New testcase.
* sim/fr30/bne.cgs: New testcase.
* sim/fr30/bc.cgs: New testcase.
* sim/fr30/bnc.cgs: New testcase.
* sim/fr30/bn.cgs: New testcase.
* sim/fr30/bp.cgs: New testcase.
* sim/fr30/bv.cgs: New testcase.
* sim/fr30/bnv.cgs: New testcase.
* sim/fr30/blt.cgs: New testcase.
* sim/fr30/bge.cgs: New testcase.
* sim/fr30/ble.cgs: New testcase.
* sim/fr30/bgt.cgs: New testcase.
* sim/fr30/bls.cgs: New testcase.
* sim/fr30/bhi.cgs: New testcase.
* sim/fr30/call.cgs: Test ret here as well.
* sim/fr30/ld.cgs: Remove bogus comment.
* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
* sim/fr30/div.ms: New testcase.
* sim/fr30/st.cgs: New testcase.
* sim/fr30/sth.cgs: New testcase.
* sim/fr30/stb.cgs: New testcase.
* sim/fr30/mov.cgs: New testcase.
* sim/fr30/jmp.cgs: New testcase.
* sim/fr30/ret.cgs: New testcase.
* sim/fr30/int.cgs: New testcase.
Set mips_fpu, and mips_fpu_bitsize.
Set sim_gen, and sim_igen_machine.
* configure: Rebuild.
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
* sim/fr30/div0s.cgs: New testcase.
* sim/fr30/div0u.cgs: New testcase.
* sim/fr30/div1.cgs: New testcase.
* sim/fr30/div2.cgs: New testcase.
* sim/fr30/div3.cgs: New testcase.
* sim/fr30/div4s.cgs: New testcase.
* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
(tx3904sio_tickle): fflush after a stdout character output.
* sim/fr30/testutils.inc (set_s_user): Correct Mask.
(set_s_system): Correct Mask.
* sim/fr30/ld.cgs (ld): Move previously failing test back
into place.
* sim/fr30/ldm0.cgs: New testcase.
* sim/fr30/ldm1.cgs: New testcase.
* sim/fr30/stm0.cgs: New testcase.
* sim/fr30/stm1.cgs: New testcase.
* configure: Regenerate.
* sim-main.h: Protect against multiple inclusion.
Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
Done by cgen-sim.h now.
* tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
* cpuall.h: Regenerate.
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract16): Make static inline again.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(extract32): Ditto.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(execute): Test ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
* mloopx.in: Rewrite.
* cgen-sim.h: Simple header that includes others.
* sim-arange.c: New file.
* sim-arange.h: New file.
* sim-basics.h: Include it.
* Make-common.in (SIM_NEW_COMMON_OBJS): Add sim-arange.o.
(sim-arange.o): Add rule for.
* sim-cpu.h (sim_cpu_msg_prefix): Add prototype.
(sim_io_eprintf_cpu): Add prototype.
* sim-inline.h (HAVE_INLINE): Define if GNUC.
(INLINE2): New macro.
(EXTERN_INLINE): New macro.
* sim-module.c (sim_post_argv_init): Initialize cpu backlink
before calling module init fns.
* sim-profile.h (OPTION_PROFILE_*): Move into enum.
(profile_init): New function.
(profile_options): New option --profile-range.
(profile_option_handler): Handle --profile-range.
(profile_print_insn): Qualify address range specific section titles.
(profile_print_addr_ranges): New function.
(profile_info): Print address ranges if specified.
(profile_install): Set profile_init init fn.
* sim-profile.h (PROFILE_DATA): New member `range'.
* sim-trace.c (trace_init): New function.
(trace_options): New option --trace-range.
(trace_option_handler): Handle --trace-range.
(trace_install): Set trace_init init fn.
* sim-trace.h (TRACE_DATA): New member `range'.
* sim-utils.c (sim_cpu_msg_prefix): New function.
(sim_io_eprintf_cpu): New function.
* cgen-engine.h (PC_IN_TRACE_RANGE_P): New macro.
(PC_IN_PROFILE_RANGE_P): New macro.
* cgen-trace.c (trace_insn_init): Set current_insn to NULL.
(trace_insn_fini): New arg abuf. All callers updated.
Exit early if trace_insn not called. Check ARGBUF_PROFILE_P before
printing cycle counts.
* cgen-trace.h (trace_insn_fini): Update prototype.
(TRACE_RESULT_P): New macro.
(TRACE_INSN_INIT,TRACE_INSN_FINI): New arg abuf. All callers updated.
(TRACE_INSN): Check ARGBUF_TRACE_P.
(TRACE_EXTRACT,TRACE_RESULT): New arg abuf. All callers updated.
* cgen-types.h (SIM_INLINE): Delete.
(SIM_HAVE_MODEL,SIM_HAVE_ADDR_RANGE): Define.
* cgen-utils.c: Don't include cgen-engine.h
* genmloop.sh (@cpu@_fill_argbuf): New function.
(@cpu@_fill_argbuf_tp): New function.
(@cpu@_emit_before,@cpu@_emit_after): New functions.
(@cpu@_pbb_begin): Prefix cti_sc,insn_count with '_'.
(SET_CTI_VPC,SET_INSN_COUNT): Update.
(@cpu@_pbb_before): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_INIT,TRACE_INSN_FINI.
(@cpu@_pbb_after): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_FINI.
* sim/fr30/ld.cgs: Implement more loads.
* sim/fr30/call.cgs: New testcase.
* sim/fr30/testutils.inc (testr_h_dr): New macro.
(set_s_user,set_s_system): New macros.
[common/ChangeLog]
1998-12-01 Frank Ch. Eigler <fche@elastic.org>
* sim-gx-run.c (sim_engine_run): Use new tgx_info struct to
collect run-time arguments to gx block.
* sim-gx.h (sim_gx_function): Corresponding signature change.
* sim-gx.c (sim_gx_compiled_block_f): Remove nonfunctional code to
again compile a gx block source file.
(sim_gx_compiled_block_dispose): Uninstall obsoleted gx block
shared libraries.
(sim_gx_block_translate): Always emit new "gx_label_NNNN" labels,
for basic block entry points, even if !__GNUC__.
[m32r-gx/ChangeLog]
1998-12-01 Frank Ch. Eigler <fche@elastic.org>
* Makefile.in (SIM_OBJS): Don't build sim-core.o.
* configure.in: Added --enable-sim-inline support.
Look for "getenv()" function.
* configure: Rebuilt.
* config.in: Rebuilt.
* gx-translate.c: Include "sim-inline.c" for sim-core inlining.
(m32r_gx_{load,store}*): Update signature.
(tgx_emit_pre_function): Emit new "tgx_info" struct, update
callback function signatures.
(m32r_emit_*_insn): Use new callback signatures. For all short
branches in optimized mode, emit direct "goto gx_label_NNNN".
(tgx_optimize_test): If the GX_OPTIMIZE environment variable is
set, allow its integer value to override the optimization heuristic.
* m32r-sim.h: New empty placeholder file.
* sim-main.c: New empty placeholder file.
* sim-if.c (sim_create_inferior): Use NULL instead of &abort
for unimplemented register fondling functions.
* sim-main.h: Add multiple inclusion guard. Update callback
function signatures.
(tgx_info): New struct for collecting gx block invocation
arguments.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*. Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
(CGEN_ARCH_SCM): New variable.
* cgen-engine.h (EXTRACT_[ML]SB0_{INT,UINT}): New macros.
(EXTRACT_INT,EXTRACT_UINT): New macros.
(SEM_SEM_ARG): New macro.
(SEM_NEXT_VPC): New arg `pc'.
* cgen-sim.h (EXTRACT_SIGNED,EXTRACT_UNSIGNED): Delete.
(sim_disassemble_insn): Update prototype.
* cgen-trace.c (current_insn,insn_fields): New static locals.
(trace_insn): Set them.
* cgen-utils.scm: #include cgen-engine.h.
(sim_disassemble_insn): New arg insn_fields.
Handle variable length insns.
* genmloop.sh: Only emit pbb decls if -pbb.
(${cpu}_scache_lookup): New arg `vpc'.
(scache support): Fetch pc before entering loop.
[d30v/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
[testsuite/d30v-elf/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* do-shifts.S: Add test for large mvfacc shifts.
HAVE_PARALLEL_INSNS, define as 0 or 1. Emit decls of fns in mloop.cin.
* cgen-engine.h: Typedefs of IADDR,CIA,SEM_ARG,SEM_PC moved ...
* cgen-sim.h: ... to here.
Thu Oct 29 12:07:06 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn.
* t-padsbh.s: New test.
* t-mult1.s: New test.
* Makefile.in: Run them.
routine as the number of bytes to process. This apparently is due to
text-mode vs binary-mode. If the mounts are done text-mode, then the
size returnedby fstat() may be different than the number of bytes
"read" in text mode.
(sim-core.o): Delete duplicate dependence on $(SIM_EXTRA_DEPS).
(sim-cpu.o,sim-endian.o,sim-hw.o): Ditto.
(cgen-run.o,cgen-scache.o,cgen-trace.o,cgen-utils.o): Delete
explicit cgen header dependencies, require SIM_EXTRA_DEPS to include
CGEN_INCLUDE_DEPS.
* cgen-cpu.h: New file.
* cgen-engine.h: New file.
* cgen-scache.h: New file.
* cgen-sim.h: Delete portions moved to new files.
* genmloop.sh: Generate two files eng.hin,mloop.cin explicitly,
rather than sending result to stdout.
(cgen-run.o): New rule.
* cgen-ops.h: Delete many BI macros. Change all UBI -> BI.
* cgen-run.c (prime_cpu): New function.
* cgen-scache.c: Add pseudo-basic-block (pbb) scaching support.
(scache_option_handler, case OPTION_PROFILE_SCACHE): Handle explicitly
mentioned cpu.
(scache_flush_cpu,scache_lookup,scache_lookup_or_alloc): New fns.
* cgen-sim.h (CGEN_INSN_VIRTUAL_TYPE): New enum.
(CGEN_INSN_VIRTUAL_P): New macro.
(SEM_PC): New typedef.
(SEMANTIC_FN): Change type of result to SEM_PC.
(SEM_SET_FULL_CODE,SEM_SET_FAST_CODE,SEM_SET_CODE): New macros.
(IDESC_CTI_P,IDESC_SKIP_P): New macros.
(SCACHE_MAP): New typedef.
(CPU_SCACHE): Add pbb support.
(scace_lookup,scache_lookup_or_alloc,scache_flush_cpu): Declare.
(SEM_BRANCH_INIT_EXTRACT,SEM_BRANCH_INIT,SEM_BRANCH_FINI): New macros.
(CGEN_CPU): New members running_p,insn_count,{fast,full}_engine_fn,
max_slice_insns.
(INSN_NAME): Delete.
(cgen_insn_name): Declare.
(sim_engine_invalid_insn): Renamed from sim_engine_illegal_insn.
* cgen-trace.c (trace_buf): Shrink from 1024 to 256 bytes.
(first_insn_p): Make static.
(trace_insn): Handle virtual insns specially.
(cgen_trace_printf): Ensure we haven't overflowed the buffer.
* cgen-types.h (UBI): Delete.
(MODE_TYPE): New enum.
(HOSTINT,HOSTUINT,HOSTPTR): Delete.
* cgen-utils.c (mode_names): Delete UBI. Add INT,UINT,PTR.
(cgen_virtual_opcode_table): New global.
(cgen_insn_name): New function.
(sim_disassemble_insn): Ignore virtual insns.
* genmloop.sh: Delete top level loop generation. Add pbb support.
* sim-cpu.h (CPU_INSN_NAME_FN): New typedef.
(sim_cpu_base): New members max_insns,insn_name,model_data.
(CPU_PC_GET,CPU_PC_SET): New macros.
(sim_pc_get,sim_pc_set): Declare.
* sim-model.c (model_set): Call model init fn.
* sim-model.h (MODEL_FN): New typedef.
(INSN_TIMING): New member model_fn.
(MODEL): New members num,init.
* sim-profile.c (sim_profile_print_bar): Renamed from print_bar.
All callers updated.
(profile_insn_init): New fn.
(profile_print_insn): Update, INSN_NAME -> CPU_INSN_NAME.
Exit early if insn profiling not supported.
(profile_print_memory): Update, MAX_MODES -> MODE_TARGET_MAX.
(profile_install): Record profile_insn_init as init fn.
(profile_uninstall): Free PROFILE_INSN_COUNT if non-null.
* sim-profile.h: Update, MAX_MODES -> MODE_TARGET_MAX.
(PROFILE_DATA): Delete member exec_time.
Change insn_count to pointer to array, rather than the array.
(sim_profile_print_bar): Declare.
Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com>
* r5900.igen (mtsab): Correct typo in input register.
* sim-main.h (TMP_*): New macros for accessing local 128-bit
temporary for multimedia instructions.
* r5900.igen (*): Convert most instructions to use new TMP
macros to store output result during computation.
* interp.c: use NUM_CORE_REGS
* sky-gdb.c (set_fifo_breakpoints): use VIF interrupt bit for break
* sky-pke.c (pke_issue): use interrupt bit for break points
Hack sanitize so that it doesn't sanitize vrXXX when either of
keep-vr5400 or keep-vr4320 are specified.
Move two basic vr4100 instructions from mips.igen to vr.igen.
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
(syscall_read_mem, syscall_write_mem): New functions for syscall
callbacks.
* mn10300_sim.h: Add prototypes for syscall_read_mem and
syscall_write_mem.
* mn10300.igen: Change C++ style comments to C style comments.
Check for divide by zero in div and divu ops.
Do not sign extend immediate for mov imm,XRn.
More random mul, mac & div fixes.
Remove some unused variables.
Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
Minor fixes in multiply/divide patterns.
start-sanitize-am33
* am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
fixes to 2 register multiply, divide and mac instructions. Set
Z,N correctly for sat16. Sign extend 24 bit immediate for add,
and sub instructions.
* am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
(CPU_SCACHE_HASH_MASK): New macro.
(SCACHE_HASH_PC): Rewrite.
* genmloop.sh (engine_resume_{full,fast}): Move some of hash
computation out of main loop.
* dv-mn103tim.c: Include sim-assert.h
* dv-mn103ser.c (do_polling_event): Check for incoming data on
serial line and schedule next polling event.
(read_status_reg): schedule events to check for incoming data on
serial line and issue interrupt if necessary.
* sky-pke.c(read_pke_pcx): return index of current pc
* sky-pke.h: export read_pke_pcx
* interp.c(sim_fetch_registers): read pke pc/pcx
* sky-libvpe.c: track name change from GDB
* sim-main.h: add vif memory based pc
- extend gdb comm area for fifo breakpoints
- define SIM_ENGINE_RESTART_HOOK
* sky-gdb.c: add support for VIF breakpoints
Tue Jun 16 09:03:37 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-cop2.s: Reorder instruction blocks to prevent "Out of bounds"
messages during test execution. Added dummy branch labels for BC2*
instructions.
* t-cop2.brn: Use --sky-debug option instead of env var.
* t-cop2.vuexpect: Updated for with new disassembly format.
* sky_sce_fast.exp: Don't compare GIF outputs for
--float-type=fast.
* sce_test{17,33,49}.dvpasm: Use ".DmaPackVif 1" option to
exercise assembler / PKE.
* rw-vureg.c: Cast memcpy operand to allay warning.
any open file handles before exiting
* sky-gpuif.[c|h]: add disassembly on the fly code, log and log
file option support
* sky-gdb.[c|h] (sky_command_options_close()): new function, added
some body to the log and log file option sections
which is now a list of options controlling the behaviour of sim_run.
* sim/sky/sky-defs.tcl (run_trc_test): Update to new way of
environment variables to sim_run.
* dv-mn103int.c (external_group): Use enumerated types to access
correct group addresses.
* dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
triggers an interrupt on the higher-numbered timer's port.
Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* sim/sky/t-int.c: New file to test sky hardware
interrupts.
* sim/sky/t-int-handler.s: New file for null interrupt
handler.
* sim/sky/t-int.brn: New file to build new test.
Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
register upon non-zero interrupt event level, clear upon zero
event value.
* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
by passing zero event value.
(*_io_{read,write}_buffer): Endianness fixes.
* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
(deliver_*_tick): Reduce sim event interval to 75% of count interval.
* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
serial I/O and timer module at base address 0xFFFF0000.
using sim-options.
start-sanitize-am30
* (board): Add --board option for specifying am32.
* (sim_open): Create new timer and serial devices and control
configuration of other am32 devices via board option.
end-sanitize-am30
It is not yet properly tested.
Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904tmr.c: New file - implements tx3904 timer.
* dv-tx3904{irc,cpu}.c: Mild reformatting.
* configure.in: Include tx3904tmr in hw_device list.
* configure: Rebuilt.
* interp.c (sim_open): Instantiate three timer instances.
Fix address typo of tx3904irc instance.
byte-swapping unnecessary. Add -sparclite-board option for
emulating RAM found on typical SPARClite boards. Print
error message for unrecognized option.
* erc32.c: Change RAM address and size from constants to variables,
to allow emulation of SPARClite board RAM.
(fetch_bytes, store_bytes): New helper functions for revamped
mememory_read and memory_write.
(memory_read, memory_write): Rewrite to store bytes in target
byte order instead of storing words in host byte order; this
greatly simplifies support of little-endian programs.
(get_mem_ptr): Remove unnecessary byte parameter.
(sis_memory_write, sis_memory_read): Store words in target
byte order instead of host byte order.
(byte_swap_words): Remove, no longer needed.
* sis.h ((byte_swap_words): Remove declaration, no longer needed.
(memory_read): Add new sz parameter.
* sis.c (run_sim): Use revamped memory_read, which makes
byte-swapping unnecessary.
* exec.c (dispatch_instruction): Use revamped memory_read, which
makes byte-swapping and double-word fetching unnecessary.
* func.c (sparclite_board): Declare new variable.
(get_regi): Handle little-endian data.
(bfd_load): Recognize little-endian SPARClite as having
little-endian data.
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case
of ":tt" to catch stdin in addition to stdout.
(ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure
or success of lseek().
From PR 15839, modified a bit by me to appease my sense of style--but
not too much because I am lazy.
Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
* lib/sim-defs.exp (sim_run): Add possible environment variable
list to simulator run.
start-sanitize-sky
* sim/sky/sky-defs.tcl: Use it.
* sim/sky/t-pke2.vif1out: Update to match recent word-precise
tracking table change in sim/mips/sky-pke.c.
* sim/sky/t-pke3.trc: Ditto.
* sim/sky/t-pke4.vif0expect: Ditto.
end-sanitize-sky
Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>
* mloopx.in (extract): Set abuf.addr for proper fill nop counting.
(execute): Count parallel insns.
* sim-if.c (print_m32r_misc_cpu): Print count.
* sim-main.h (M32R_MISC_PROFILE): New member parallel_count.
(trace_insn_init): Set it.
(trace_insn_fini): Use TRACE_PREFIX.
(trace_insn): Rewrite to use trace_prefix.
* sim-trace.c (trace_prefix): Don't print filename arg if NULL.
Adjust width accordingly.
* sim-profile.h (PROFILE_DATA): New member profile_any_p.
(PROFILE_ANY_P,PROFILE_INSN_P,PROFILE_MEMORY): New macros.
(PROFILE_SCACHE_P,PROFILE_PC_P,PROFILE_CORE_P): New macros.
(PROFILE_COUNT_INSN,PROFILE_COUNT_READ,PROFILE_COUNT_WRITE): Simplify.
(PROFILE_COUNT_CORE): Simplify.
* sim-profile.c (profile_option_handler): Compute profile_any_p.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
modules. Recognize TX39 target with "mips*tx39" pattern.
* configure: Rebuilt.
* sim-main.h (*): Added many macros defining bits in
TX39 control registers.
(SignalInterrupt): Send actual PC instead of NULL.
(SignalNMIReset): New exception type.
* interp.c (board): New variable for future use to identify
a particular board being simulated.
(mips_option_handler,mips_options): Added "--board" option.
(interrupt_event): Send actual PC.
(sim_open): Make memory layout conditional on board setting.
(signal_exception): Initial implementation of hardware interrupt
handling. Accept another break instruction variant for simulator
exit.
(decode_coproc): Implement RFE instruction for TX39.
(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
* interp.c: Define "jmr3904" and "jmr3904debug" board types and
bbegin to implement memory map.
* dv-tx3904cpu.c: New file.
* dv-tx3904irc.c: New file.
end-sanitize-tx3904
* sim-engine.h (sim_engine_set_run_state): Declare.
* genmloop.sh (pending_reason,pending_sigrc): New static locals.
(@cpu@_engine_stop): New args reason,sigrc. All callers updated.
(engine_resume): Reorganize. Allow synchronous exit from main loop.
* exec.c (SDIV, SDIVCC, UDIV, UDIVCC): Define new opcodes.
* (mul64): Simplify calculation of negative result.
* (div64): New helper function for 64-bit division.
* (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV,
and UDIVCC.
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
Add special r3900 version of do_mult_hilo.
(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
with calls to check_mult_hilo.
(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
with calls to check_div_hilo.
for VU memory tracking tables.
Thu May 7 12:15:41 1998 Frank Ch. Eigler <fche@cygnus.com>
* sky-pke.c (pke_pcrel_operand_bits): Compute word-resolution
source address for UNPACK into VU MEM.
(pke_code_mpg): Ditto for MPG into VU uMEM.
Frank Ch. Eigler
Doug Evans
Jason Molenda
Felix Lee
Stan Shebs
Gavin Romig-Koch
Dave Brolley
Andrew Cagney
Jeff Law
Jim Wilson
Michael Meissner
Michael Snyder
Drew Moseley
Nick Clifton
Ron Unrau
Ken Raeburn
Joyce Janczyn
Jeff Holcomb
Ian Lance Taylor
Jillian Ye
James Lemke
Patrick Macdonald
release
Ian Carmichael
David Taylor
Mark Alexander