binutils-gdb/opcodes/ChangeLog

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2003-07-30 Jason Eckhardt <jle@rice.edu>
* i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
2003-07-30 17:53:12 +02:00
2003-07-30 Nick Clifton <nickc@redhat.com>
* po/ro.po: Updated Romanian translation.
2003-07-29 Jakub Jelinek <jakub@redhat.com>
* ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.
2003-07-24 13:16:05 +02:00
2003-07-24 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.
2003-07-18 Nick Clifton <nickc@redhat.com>
* arm-dis.c (parse_arm_disassembler_option): Do not expect
option string to be NUL terminated.
(parse_disassembler_options): Allow options to be space or
comma separated.
2003-07-17 16:22:45 +02:00
2003-07-17 Nick Clifton <nickc@redhat.com>
* po/es.po: New Spanish translation.
* po/sv.po: New Swedish translation.
* po/opcodes.pot: Regenerate.
2003-07-15 Richard Sandiford <rsandifo@redhat.com>
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
2003-07-14 Nick Clifton <nickc@redhat.com>
* po/tr.po: Update with latest version.
* po/POTFILES.in: Regenerate.
* Makefile.in: Regenerate.
2003-07-11 07:10:21 +02:00
2003-07-11 Alan Modra <amodra@bigpond.net.au>
* po/opcodes.pot: Regenerate.
2003-07-09 Alexandre Oliva <aoliva@redhat.com>
2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands. Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3. Print out FP register names.
2003-07-09 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (set_default_mips_dis_options): Get BFD from
the disassembler_info's section, rather than from the
disassembler_info's symbols pointer.
2003-07-07 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
extraneous ATTRIBUTE_UNUSED.
* ppc-dis.c (print_insn_powerpc): Always pass a valid address to
operand->extract.
2003-07-04 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Convert to C90, removing unnecessary prototypes and
casts. Formatting.
* ppc-opc.c: Remove PARAMS from prototypes.
(FXM4): Define.
(insert_fxm): New function, used by both FXM and FXM4.
(extract_fxm): Likewise.
(XFXFXM_MASK): Remove 1 << 20 term.
(powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
2003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (s390_extract_operand): Add support for long displacements.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
* s390-opc.c (D20_20): Add define for 20 bit displacements.
(INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
new instruction formats.
(MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
(s390_opformats): Likewise.
* s390-opc.txt: Add new instructions for cpu type z990. Add missing
hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-06-23 22:15:34 +02:00
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-19 Christian Groessler <chris@groessler.org>
* z8k-dis.c (instr_data_s): Change tabl_index from long to int.
(print_insn_z8k): Correctly check return value from
z8k_lookup_instr call.
(unparse_instr): Handle CLASS_IRO case.
* z8kgen.c: Fix function definitions. Fix formatting.
(opt): Add brk opcode alias for non-simulator breakpoint. Add
missing and fix existing in/out and sin/sout opcode definitions.
(args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
opcodes.
(internal): Check p->flags for non-zero before dereferencing it.
(gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
opcodes and renumber the remaining lines repectively.
(main): Remove "-d" command line switch.
* z8k-opc.h: Regenerate with new z8kgen.c.
2003-06-11 H.J. Lu <hongjiu.lu@intel.com>
* po/Make-in (DESTDIR): New.
(install-data-yes): Support $(DESTDIR).
(uninstall): Likewise.
2003-06-11 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2003-06-10 Doug Evans <dje@sebabeach.org>
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
CGEN_INSN_RELAXED.
* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
2003-06-10 Gary Hade <garyhade@us.ibm.com>
Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c (DQ, RAQ, RSQ, RTQ): Define.
(insert_dq, extract_dq, insert_raq, insert_rtq, insert_rsq): New.
(powerpc_opcodes): Add "attn", "lq" and "stq".
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
rts/l and rte/l register lists.
2003-06-03 Nick Clifton <nickc@redhat.com>
* frv-desc.c: Regenerate.
* frv-opc.c: Regenerate.
* frv-asm.c: Regenerate.
* frv-desc.h: Regenerate.
* frv-dis.c: Regenerate.
* frv-ibld.c: Regenerate.
* frv-opc.h: Regenerate.
* po/opcodes.pot: Regenerate.
2003-06-03 Michael Snyder <msnyder@redhat.com>
and Bernd Schmidt <bernds@redhat.com>
and Alexandre Oliva <aoliva@redhat.com>
* disassemble.c (disassembler): Add support for h8300sx.
* h8300-dis.c: Ditto.
2003-06-03 Nick Clifton <nickc@redhat.com>
* frv-desc.c: Regenerate.
* frv-opc.c: Regenerate.
* aclocal.m4: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
* iq2000-asm.c: Regenerate.
* iq2000-desc.c: Regenerate.
* iq2000-desc.h: Regenerate.
* iq2000-dis.c: Regenerate.
* iq2000-ibld.c: Regenerate.
* iq2000-opc.c: Regenerate.
* iq2000-opc.h: Regenerate.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2003-05-23 Jason Eckhardt <jle@rice.edu>
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
2003-05-18 Jason Eckhardt <jle@rice.edu>
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
print it.
2003-05-17 Andreas Jaeger <aj@suse.de>
* Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.
(libopcodes_la_DEPENDENCIES): Add libbfd.la.
* Makefile.in: Regenerated.
2003-05-16 11:39:56 +02:00
2003-05-16 Nick Clifton <nickc@redhat.com>
* configure.in (ALL_LINGUAS): Add Romanian translation.
* configure: Regenerate.
* po/ro.po: New file: Romanian translation.
2003-05-12 13:57:32 +02:00
2003-05-12 Dhananjay Deshpande <dhananjayd@kpitcummins.com>
* disassemble.c (disassembler): Add support for h8300hn and h8300sn.
2003-05-09 Alan Modra <amodra@bigpond.net.au>
* i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
case char is unsigned.
2003-05-01 Christian Groessler <chris@groessler.org>
* z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.
(unpack_instr): Fix representation of segmented addresses.
(intr_name): Added, contains names of the parameters to the EI/DI
instructions.
(unparse_instr): Fix display of EI/DI parameters.
2003-04-22 Doug Evans <dje@sebabeach.org>
* fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.
* frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate.
* ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate.
* m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
* openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate.
* xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
* h8500-opc.c: Replace occurrances of 'Hitachi' with 'Renesas'.
2003-04-07 James E Wilson <wilson@tuliptree.org>
* ia64-ic.tbl (fr-readers): Add mem-writers-fp.
* ia64-asmtab.c: Regenerate.
2003-04-08 Alexandre Oliva <aoliva@redhat.com>
* mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.
2003-04-07 Alexandre Oliva <aoliva@redhat.com>
* mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.
2003-04-04 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x-dis.c: Namespace cleanup. Replace s/c4x/tic4x and
s/c3x/tic3x/
2003-04-01 15:08:06 +02:00
2003-04-01 Nick Clifton <nickc@redhat.com>
* arm-dis.c: Remove presence of (r) and (tm) symbols.
* arm-opc.h: Remove presence of (r) and (tm) symbols.
2003-03-25 21:56:01 +01:00
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>
2003-03-25 21:56:01 +01:00
Contribute support for Intel's iWMMXt chip - an ARM variant:
* arm-dis.c (regnames): Add iWMMXt register names.
(set_iwmmxt_regnames): New function.
(print_insn_arm): Handle iWMMXt formatters.
* arm-opc.h: Document iWMMXt formatters.
(arm_opcod): Add iWMMXt instructions.
2003-03-22 Doug Evans <dje@sebabeach.org>
* i386-dis.c (dis386): Recognize icebp (0xf1).
2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
S390_OPCODE_ZARCH.
(print_insn_s390): Use new modes field of s390_opcodes.
* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
(insertOpcode): Replace archbits by min_cpu and mode_bits.
(dumpTable): Write mode_bits and min_cpu instead of archbits.
(main): Adapt to new format in s390-opcode.txt.
* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
mode_bits.
* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-17 12:43:30 +01:00
2003-03-17 Nick Clifton <nickc@redhat.com>
* ppc-opc.c: Fix formatting. Update copyright date.
2003-03-14 Daniel Jacobowitz <drow@mvista.com>
* ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.
2003-02-25 Alan Modra <amodra@bigpond.net.au>
* hppa-dis.c: Formatting.
2003-02-25 Matthew Wilcox <willy@debian.org>
* hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
* hppa-dis.c (print_insn_hppa <2 bit space register>): Do not print
the space register when the value is zero.
2003-02-23 Elias Athanasopoulos <elathan@phys.uoa.gr>
* mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned,
use ARRAY_SIZE in loops.
2003-02-12 Dave Brolley <brolley@redhat.com>
* fr30-desc.c: Regenerate.
2003-02-06 Gwenole Beauchesne <gbeauchesne@mandrakesoft.com>
* i386-dis.c (dq_mode, Edq): Define.
(dis386_twobyte): Correct movd operands.
(OP_E): Handle dq_mode case.
2003-01-29 Henric Jungheim <henric@attbi.com>
* sparc-dis.c (print_insn_sparc): When examining values added in
to rs1, make sure that there are previous instructions.
2003-01-23 19:50:57 +01:00
2003-01-23 Nick Clifton <nickc@redhat.com>
* Add sh2e support:
2002-04-02 Alexandre Oliva <aoliva@redhat.com>
* sh-dis.c (print_insn_shx): Handle bfd_mach_sh2e.
* sh-opc.h (arch_sh2e, arch_sh2e_up): New.
(arch_sh2_up): Added sh2e.
(sh_table): Replaced all occurrences of arch_sh3e_up with
arch_sh2e_up, except in fsqrt.
include/elf/ChangeLog * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
2003-01-23 12:51:35 +01:00
2003-01-23 Alan Modra <amodra@bigpond.net.au>
* sh64-dis.c: Include elf32-sh64.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2003-01-17 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
PAL entry points.
2003-01-16 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2003-01-08 Klee Dienes <kdienes@apple.com>
* Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
* Makefile.in: Regenerate.
2003-01-08 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.
2002-01-02 Ben Elliston <bje@redhat.com>
Jeff Johnston <jjohnstn@redhat.com>
* iq2000-asm.c: New file.
* iq2000-desc.c: Likewise.
* iq2000-desc.h: Likewise.
* iq2000-dis.c: Likewise.
* iq2000-ibld.c: Likewise.
* iq2000-opc.c: Likewise.
* iq2000-opc.h: Likewise.
* Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h.
(CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c,
iq2000-ibld.c, iq2000-opc.c.
(ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo,
iq2000-ibld.lo, iq2000-opc.lo.
(CLEANFILES): Add stamp-iq2000.
(IQ2000_DEPS): New macro.
(stamp-iq2000): New target.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_iq2000_arch.
* configure: Regenerate.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (print_insn_args): Use position extracted by "+A"
to calculate size for "+B". Redo code for "+C" so it shares
the same style as "+A" and "+B" now do.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c: Update copyright years.
(print_insn_arg): Rename to...
(print_insn_args): This, returning void. Process the whole
string of args rather than a single one. Reindent.
(print_insn_mips): Update to match the above.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Move "di" into the
right order alphabetically, and make all hex constants use
lower-case letters.
[ gas/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (validate_mips_insn, mips_ip): Recognize the "+D" operand, which will be used only by the disassembler. [ gas/testsuite/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32r2.d: New test. * gas/mips/cp0sel-names-mips64.d: New test. * gas/mips/cp0sel-names-numeric.d: New test. * gas/mips/cp0sel-names-sb1.d: New test. * gas/mips/cp0sel-names.s: New test source file. * gas/mips/mips.exp: Run new tests. [ include/opcode/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips.h: Note that the "+D" operand type name is now used. [ opcodes/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0sel_name): New structure. (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2) (mips_cp0sel_names_sb1): New arrays. (mips_arch_choice): New structure members "cp0sel_names" and "cp0sel_names_len". (mips_arch_choices): Add references to new cp0sel_names arrays as appropriate, and make all existing entries reference appropriate mips_XXX_names_numeric arrays rather than simply using NULL. (mips_cp0sel_names, mips_cp0sel_names_len): New variables. (lookup_mips_cp0sel_name): New function. (set_default_mips_dis_options): Set mips_cp0sel_names and mips_cp0sel_names_len as appropriate. Remove now-unnecessary checks for NULL register name arrays. (parse_mips_dis_option): Likewise. (print_insn_arg): Handle "+D" operand type. * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register names symbolically.
2002-12-31 09:11:18 +01:00
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-31 08:29:29 +01:00
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
2002-12-30 20:25:13 +01:00
2002-12-30 Dmitry Diky <diwil@mail.ru>
* configure.in: Add msp430 target.
* configure: Regenerate.
* disassemble.c: Add entry for msp430 disassembly.
* msp430-dis.c: New file: msp430 disassembler.
[ binutils/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-27 09:00:31 +01:00
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* disassemble.c (disassembler_usage): Add invocation of
print_mips_disassembler_options.
* mips-dis.c: Include libiberty.h.
(print_mips_disassembler_options, set_default_mips_dis_options)
(parse_mips_dis_option, parse_mips_dis_options, choose_abi_by_name)
(choose_arch_by_name, choose_arch_by_number): New functions.
[ binutils/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-27 09:00:31 +01:00
(mips_abi_choice, mips_arch_choice): New structures.
(mips32_reg_names, mips64_reg_names, reg_names): Remove.
(mips_gpr_names_numeric, mips_gpr_names_oldabi)
(mips_gpr_names_newabi, mips_fpr_names_numeric)
(mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
(mips_cp0_names_numeric, mips_cp0_names_mips3264)
(mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
(mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
(mips_cp0_names): New variables.
(print_insn_args): Use new variables to print GPR, FPR, and CP0
register names.
(mips_isa_type): Remove.
(print_insn_mips): Remove ISA and CPU setup since it is now done...
(_print_insn_mips): Here. Remove register setup code, and
call set_default_mips_dis_options and parse_mips_dis_options
instead.
(print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-23 00:24:29 +01:00
2002-12-23 Alan Modra <amodra@bigpond.net.au>
* Makefile.in: Regenerate.
2002-12-19 Nick Kelsey <nickk@ubicom.com>
* cgen-asm.c (cgen_parse_keyword): Added underscore to symbol character
check to fix false keyword trigger with names such as <keyword>_foo.
2002-12-19 Doug Evans <dje@sebabeach.org>
* Makefile.am (CGEN_CPUS): New variable.
(run-cgen-all): New rule.
* Makefile.in: Regenerate.
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
"dror" entries, and reorder the remaining "dror" and "ror" entries.
2002-12-16 DJ Delorie <dj@delorie.com>
* xstormy16-asm.c (parse_immediate16): Add prototype.
2002-12-17 04:57:49 +01:00
2002-12-16 Andrew MacLeod <amacleod@redhat.com>
* xstormy16-asm.c: Regenerate.
2002-12-16 Alan Modra <amodra@bigpond.net.au>
* ns32k-dis.c (print_insn_ns32k): Constify "d", remove register
keyword.
2002-12-13 Alan Modra <amodra@bigpond.net.au>
* h8500-opc.h (h8500_table): Add missing initializers to quiet
warnings.
* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
* pj-opc.c (pj_opc_info): Add braces around union initializer.
* z8kgen.c: Include "libiberty.h".
(opt, args, toks): Fix initializer warnings.
(chewname): Make "name" a char **. Return mnemonic trimmed of
operands.
(gas): Improve emitted "DO NOT EDIT" warning. Format emitted
opcode_entry_type, and make "nicename" and "name" const. Make
z8k_table const too. Formatting. Generate idx as gas needs it.
* z8k-opc.h: Regenerate.
2002-12-08 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-dis.c (print_indexed_operand): Fix PC-relative address
for 9 and 16-bit PC-relative addressing mode.
2002-12-05 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c: Delete evsabs, evsnabs, evsneg, evsadd, evssub,
evsmul, evsdiv, evscmpgt, evsgmplt, evststgt, evtstlt, evststeq,
evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi,
evsctsiz, evsctuf, evsctsf, evmwhssfaa, evmwhssmaa, evmwhsmfaa,
evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian,
evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa,
evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan,
evmwhgsmian, evmwhgumian.
(mftb): Add to opcode table.
(mtspefscr): Change RT to RS in opcode table.
2002-12-05 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c: Move mbar and msync up. Change mask for mbar and
msync.
2002-12-04 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-11-25 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c: Remove evmwlssf, evmwlssfa, evmwlsmf, evmwlsmfa,
evmwlssfaaw, evmwlsmfaaw, evmwlssfanw, evmwlsfanw.
2002-12-04 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (PMRN): Remove.
(RA): Set to NB + 1.
(powerpc_opcodes): Change PMRN to SPR.
Change all RD to RS.
Change mftb to look like mftbl.
Move mftb before mftbl.
Add mfbbtar.
Add mtbbtar.
Change mfpmr to use PMR.
Change mtpmr to use PMR.
(RD): Remove.
(insert_ev2): Fix mask and shift.
(extract_ev2): Same.
(insert_ev4): Same.
(extract_ev4): Same.
(PMR): Define.
(extract_pmrn): Remove.
(insert_pmrn): Remove.
2002-12-03 Richard Henderson <rth@redhat.com>
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
2002-12-02 Alan Modra <amodra@bigpond.net.au>
* arm-dis.c (print_insn_arm): Constify "insn". Formatting.
(print_insn_thumb): Likewise.
* h8500-dis.c (print_insn_h8500): Constify "opcode".
* mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
* ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
type-punned pointer warnings.
<case 'L'>: Likewise. Fix error message too.
* pdp11-dis.c (print_reg): Warning fix.
* sh-dis.c (print_movxy): Constify "op" param.
(print_insn_ddt): Constify sh_opcode_info vars.
(print_insn_ppi): Likewise.
(print_insn_sh): Likewise.
* tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
type-punned pointer warnings.
* w65-dis.c (print_insn_w65): Constify "op".
2002-12-01 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-dis.c (PC_REGNUM): Define.
(print_indexed_operand): Need an adjustment for some PC-relative
operand modes; print the final address of PC-relative modes.
(print_insn): Take into account movw/movb to adjust the PC-relative
operand addresses.
2002-11-30 Alan Modra <amodra@bigpond.net.au>
*arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c,
sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with
TRUE, false with FALSE. Simplify comparisons of bfd_boolean vars
with TRUE/FALSE. Formatting.
2002-11-25 22:15:04 +01:00
2002-11-25 DJ Delorie <dj@redhat.com>
* xstormy16-opc.c: Regenerate.
2002-11-25 Jim Wilson <wilson@redhat.com>
* ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
2002-11-15 DJ Delorie <dj@redhat.com>
* xstormy16-desc.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* xstormy16-opc.h: Regenerate.
2002-11-18 Klee Dienes <kdienes@apple.com>
* avr-dis.c: Include libiberty.h (for xmalloc).
(struct avr_opcodes_s): Remove 'bin_mask' field (it's
automatically computed in the init routine).
(AVR_INSN): No longer provide bin_mask field in initializer.
(avr_opcodes_s): Declare as const.
(print_insn_avr): Store the bin_mask field in a separate table
(allocated with xmalloc); iterate through it at the same time as
we iterate through the opcodes.
2002-11-18 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
* gas/config/tc-tic4x.c: Fixed proper commandline parameters. Added support for new opcode-list format. General error message fixups. (c4x_inst_add): Reject insn not for our CPU (md_begin): Added matrix for setting the proper opcode-level & device-flags according to cpu type and revision. Rewrite the opcode hasher. (c4x_operand_parse): Fix opcode bug (c4x_operands_match): New function argument. Added dry-run mechanism, that is optional error generation. Added constraint 'i' and 'j'. (c4x_insn_check): Added new function for post-verification of the generated insn. (md_assemble): Check all opcodes before croaking because of an argument mismatch. Need this to be able to fully support ortogonally arguments. (md_parse_options): Revised commandprompt swicthes and added new ones. (md_show_usage): Complete rewrite of printout. * gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn * gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter * gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter * gas/testsuite/gas/tic4x/allopcodes.S: Add support for new opclass.h changes * gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for the new enhanced opcodes. * gas/testsuite/gas/tic4x/opcodes.s: Regenerate * gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for the enhanced and special insns. * gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite * include/opcode/tic4x.h: File reordering. Added enhanced opcodes. * opcodes/tic4x-dis.c: Added support for enhanced and special insn. (c4x_print_op): Added insn class 'i' and 'j' (c4x_hash_opcode_special): Add to support special insn (c4x_hash_opcode): Update to support the new opcode-list format. Add support for the new special insns. (c4x_disassemble): New opcode-list support.
2002-11-18 10:09:35 +01:00
2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x-dis.c: Added support for enhanced and special insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
2002-11-16 Klee Dienes <kdienes@apple.com>
* m88k-dis.c: Include libiberty.h (for xmalloc).
(HASHTAB): New type, used to build instruction hash tables.
Contains a pointer to an INSTAB and a pointer to the next hash
chain entry.
(instructions): Move definition from m88k.h; remove initialization
of 'next' field.
(hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
(printop): Mark pointer to OPSPEC as const.
(install): Remove; fold into init_disasm.
(m88kdis): Update to ihashtab_initialized to 1 after calling
init_disasm. entry_ptr now iterates through HASHTABs, not
INSTABs.
(init_disasm): Iterate through the instructions and add to
hashtable[].
2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x-dis.c: (c4x_print_op): Add support for the new argument
format. Fix bug in 'N' register printer.
2002-11-12 Segher Boessenkool <segher@koffie.nl>
* ppc-dis.c (print_insn_powerpc): Correct condition register display.
2002-11-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (EVUIMM_4): Change bit size to 32.
(EVUIMM_2): Same.
(EVUIMM_8): Same.
2002-11-07 Klee Dienes <kdienes@apple.com>
* Makefile.am (ia64-asmtab.c): Update to use the new '--srcdir'
argument to ia64-gen.
Regenerate dependencies for ia64-len.lo.
* Makefile.in: Regenerate.
* ia64-gen.c: Convert to use getopt(). Add the standard GNU
options, as well as '--srcdir', which controls the directory in
which ia64-gen looks for the sources it uses to generate the
output table. Add a 'const' to the declaration of the final
output table. Call xmalloc_set_program_name to set the program
name.
* ia64-asmtab.c: Regenerate.
2002-11-07 Nick Clifton <nickc@redhat.com>
* ia64-gen.c: Fix comment formatting and compile time warnings.
* ia64-opc-a.c: Fix compile time warnings.
* ia64-opc-b.c: Likewise.
* ia64-opc-d.c: Likewise.
* ia64-opc-f.c: Likewise.
* ia64-opc-i.c: Likewise.
* ia64-opc-m.c: Likewise.
* ia64-opc-x.c: Likewise.
2002-11-06 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c: Change RD to RS for evmerge*.
2002-10-07 Nathan Tallent <eraxxon@alumni.rice.edu>
* sparc-opc.c (sparc_opcodes) <fb, fba, fbe, fbz, fbg, fbge,
fbl, fble, fblg, fbn, fbne, fbnz, fbo, fbu, fbue, fbug, fbuge,
fbul, fbule>: Add conditional/unconditional branch
classification.
2002-10-13 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-dis.c (print_insn): Treat bitmask and branch operands
at the end.
2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
Ken Raeburn <raeburn@cygnus.com>
Aldy Hernandez <aldyh@redhat.com>
Eric Christopher <echristo@redhat.com>
Richard Sandiford <rsandifo@redhat.com>
* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
and bfd_mach_mips5500.
* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
(N411, N412, N5, N54, N55): New convenience defines.
(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
Change dmadd16 and madd16 from V1 to N411.
2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (print_insn_mips): Always allow disassembly of
32-bit jalx opcode.
2002-09-24 15:00:33 +02:00
2002-09-24 Nick Clifton <nickc@redhat.com>
* po/de.po: Updated German translation.
2002-09-21 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2002-09-20 Nick Clifton <nickc@redhat.com>
* ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr
register names are accepted.
2002-09-17 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
Convert functions to K&R format.
2002-09-13 11:07:49 +02:00
2002-09-13 Nick Clifton <nickc@redhat.com>
* ppc-opc.c (MFDEC2): Include Book-E.
(PPCCHLK64): New opcode mask.
(evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid,
mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl,
mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1,
mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr,
mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5,
mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11,
mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0,
mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear,
mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7,
mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3,
mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0,
mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7,
mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13,
mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New
Book-E instructions.
(evfsneg): Fix opcode value.
(dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64
mask.
(mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit
Book-E.
(extsw): Restrict to 64-bit PPC instruction sets.
(extsw.): Does not exist in 64-bit Book-E.
(powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as
they are no longer needed.
2002-09-13 11:07:49 +02:00
2002-09-12 Gary Hade <garyhade@us.ibm.com>
* ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.
2002-09-11 15:52:17 +02:00
2002-09-11 Nick Clifton <nickc@redhat.com>
* po/da.po: Updated Danish translation file.
2002-09-04 Nick Clifton <nickc@redhat.com>
* ppc-opc.c (extsw, extsw.): Do not allow for the BookE32.
2002-09-04 Nick Clifton <nickc@redhat.com>
* disassemble.c (disassembler_usage): Add invocation of
print_ppc_disassembler_options.
* ppc-dis.c (print_ppc_disassembler_options): New function.
2002-09-04 Nick Clifton <nickc@redhat.com>
* ppc-opc.c: The BookE implementations of the TLBWE and TLBRE
instructions do not take any arguments.
2002-09-02 Nick Clifton <nickc@redhat.com>
* v850-opc.c: Remove redundant references to V850EA architecture.
2002-09-02 Alan Modra <amodra@bigpond.net.au>
* arc-opc.c: Include bfd.h.
(arc_get_opcode_mach): Subtract off base bfd_mach value.
2002-08-30 Alan Modra <amodra@bigpond.net.au>
* v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
* mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
2002-08-28 12:38:51 +02:00
2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com>
* configure.in: Added bfd_tic4x_arch.
* configure: Regenerate.
* Makefile.am: Added tic4x-dis.o target.
* Makefile.in: Regenerate.
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* disassemble.c: Added tic4x target and c4x
disassembler routine.
* tic4x-dis.c: New file.
2002-08-16 Christian Groessler <chris@groessler.org>
* z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex
values as those.
* z8kgen.c (opt): Fix definition of "in rd,imm16" opcode.
* z8k-opc.h: Regenerated with new z8kgen.c.
2002-08-19 Elena Zannoni <ezannoni@redhat.com>
2002-08-19 Elena Zannoni <ezannoni@redhat.com> From matthew green <mrg@redhat.com> * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and `-mefs'. Turn off AltiVec for E500 and efs. (print_insn_powerpc): Don't print an AltiVec instruction if the dialect is not efs. * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2, insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions for extracting pmrn/evld/evstd/etc operands. (CRB, CRFD, CRFS, DC, RD): New instruction fields. (CT): Make this equal to RD + 1. (PMRN): New operand. (RA): Update. (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands. (WS): Update. (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL. (ISEL, ISEL_MASK): New instruction form and mask for ISEL. (XISEL, XISEL_MASK): New instruction form and mask for ISEL. (CTX, CTX_MASK): New instruction form and mask for context cache instructions. (UCTX, UCTX_MASK): New instruction form and mask for user context cache instructions. (XC, XC_MASK, XUC, XUC_MASK): New instruction forms. (CLASSIC): New define. (PPCESPE): New define. (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New defines for integer select, cache control, branch locking, power management, cache locking and machine check APU instructions, respectively. (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul, efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt, efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf, efsctui, efsctsi, efsctsiz, efsctuf, efsctsf, evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb, evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor, evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi, evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi, evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts, evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh, evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx, evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat, evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx, evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe, evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox, evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv, evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq, evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui, evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg, evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq, evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf, evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi, evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi, evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw, evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw, evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw, evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw, evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw, evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa, evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian, evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf, evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian, evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi, evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi, evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw, evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw, evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa, evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia, evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan, evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw, evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw, evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex instructions. (rfmci): New machine check APU instruction. (isel): New integer select APU instructino. (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls, dcbtstlse, dcblc, dcblce): New cache control APU instructions. (mtspefscr, mfspefscr): New instructions. (mfpmr, mtpmr): New performance monitor APU instructions. (savecontext): New context cache APU instructions. (bblels, bbelr): New branch locking APU instructions. (bblels, bbelr): New instructions. (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-19 22:59:10 +02:00
From matthew green <mrg@redhat.com>
2002-08-19 Elena Zannoni <ezannoni@redhat.com> From matthew green <mrg@redhat.com> * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and `-mefs'. Turn off AltiVec for E500 and efs. (print_insn_powerpc): Don't print an AltiVec instruction if the dialect is not efs. * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2, insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions for extracting pmrn/evld/evstd/etc operands. (CRB, CRFD, CRFS, DC, RD): New instruction fields. (CT): Make this equal to RD + 1. (PMRN): New operand. (RA): Update. (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands. (WS): Update. (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL. (ISEL, ISEL_MASK): New instruction form and mask for ISEL. (XISEL, XISEL_MASK): New instruction form and mask for ISEL. (CTX, CTX_MASK): New instruction form and mask for context cache instructions. (UCTX, UCTX_MASK): New instruction form and mask for user context cache instructions. (XC, XC_MASK, XUC, XUC_MASK): New instruction forms. (CLASSIC): New define. (PPCESPE): New define. (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New defines for integer select, cache control, branch locking, power management, cache locking and machine check APU instructions, respectively. (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul, efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt, efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf, efsctui, efsctsi, efsctsiz, efsctuf, efsctsf, evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb, evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor, evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi, evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi, evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts, evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh, evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx, evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat, evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx, evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe, evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox, evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv, evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq, evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui, evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg, evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq, evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf, evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi, evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi, evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw, evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw, evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw, evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw, evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw, evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa, evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian, evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf, evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian, evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi, evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi, evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw, evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw, evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa, evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia, evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan, evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw, evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw, evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex instructions. (rfmci): New machine check APU instruction. (isel): New integer select APU instructino. (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls, dcbtstlse, dcblc, dcblce): New cache control APU instructions. (mtspefscr, mfspefscr): New instructions. (mfpmr, mtpmr): New performance monitor APU instructions. (savecontext): New context cache APU instructions. (bblels, bbelr): New branch locking APU instructions. (bblels, bbelr): New instructions. (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-19 22:59:10 +02:00
* ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
`-mefs'. Turn off AltiVec for E500 and efs.
(print_insn_powerpc): Don't print an AltiVec instruction if the
dialect is not efs.
* ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
for extracting pmrn/evld/evstd/etc operands.
(CRB, CRFD, CRFS, DC, RD): New instruction fields.
(CT): Make this equal to RD + 1.
(PMRN): New operand.
(RA): Update.
(EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
(WS): Update.
(EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
(ISEL, ISEL_MASK): New instruction form and mask for ISEL.
(XISEL, XISEL_MASK): New instruction form and mask for ISEL.
(CTX, CTX_MASK): New instruction form and mask for context cache
instructions.
(UCTX, UCTX_MASK): New instruction form and mask for user context
cache instructions.
(XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
(CLASSIC): New define.
(PPCESPE): New define.
(PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
defines for integer select, cache control, branch
locking, power management, cache locking and machine check
APU instructions, respectively.
(efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
2002-08-19 Elena Zannoni <ezannoni@redhat.com> From matthew green <mrg@redhat.com> * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and `-mefs'. Turn off AltiVec for E500 and efs. (print_insn_powerpc): Don't print an AltiVec instruction if the dialect is not efs. * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2, insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions for extracting pmrn/evld/evstd/etc operands. (CRB, CRFD, CRFS, DC, RD): New instruction fields. (CT): Make this equal to RD + 1. (PMRN): New operand. (RA): Update. (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands. (WS): Update. (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL. (ISEL, ISEL_MASK): New instruction form and mask for ISEL. (XISEL, XISEL_MASK): New instruction form and mask for ISEL. (CTX, CTX_MASK): New instruction form and mask for context cache instructions. (UCTX, UCTX_MASK): New instruction form and mask for user context cache instructions. (XC, XC_MASK, XUC, XUC_MASK): New instruction forms. (CLASSIC): New define. (PPCESPE): New define. (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New defines for integer select, cache control, branch locking, power management, cache locking and machine check APU instructions, respectively. (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul, efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt, efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf, efsctui, efsctsi, efsctsiz, efsctuf, efsctsf, evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb, evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor, evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi, evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi, evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts, evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh, evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx, evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat, evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx, evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe, evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox, evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv, evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq, evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui, evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg, evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq, evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf, evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi, evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi, evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw, evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw, evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw, evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw, evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw, evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa, evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian, evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf, evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian, evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi, evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi, evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw, evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw, evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa, evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia, evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan, evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw, evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw, evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex instructions. (rfmci): New machine check APU instruction. (isel): New integer select APU instructino. (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls, dcbtstlse, dcblc, dcblce): New cache control APU instructions. (mtspefscr, mfspefscr): New instructions. (mfpmr, mtpmr): New performance monitor APU instructions. (savecontext): New context cache APU instructions. (bblels, bbelr): New branch locking APU instructions. (bblels, bbelr): New instructions. (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-19 22:59:10 +02:00
evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
instructions.
(rfmci): New machine check APU instruction.
(isel): New integer select APU instructino.
(icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
dcbtstlse, dcblc, dcblce): New cache control APU instructions.
(mtspefscr, mfspefscr): New instructions.
(mfpmr, mtpmr): New performance monitor APU instructions.
(savecontext): New context cache APU instructions.
(bblels, bbelr): New branch locking APU instructions.
(bblels, bbelr): New instructions.
(mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-opc.c: Update call operand to accept the page definition.
Identify instructions that are branches and calls to generate a
RL_JUMP relocation.
2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
* m68hc11-dis.c (print_insn): Take into account 68HC12 memory
banks and fix disassembling of call instruction.
(print_indexed_operand): New param to tell whether
it was an indirect addressing operand (for disassembling call).
2002-08-09 17:07:57 +02:00
2002-08-09 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.
2002-08-08 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
2002-07-30 17:53:18 +02:00
2002-07-30 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.
2002-07-25 12:31:28 +02:00
2002-07-25 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.
* po/es.po: Updated Spanish translation.
* po/pr_BR.po: Updated Brazilian Portuguese translation.
* po/tr.po: Updated Turkish translation.
* po/fr.po: Updated French translation.
2002-07-24 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.
* po/es.po: Updated Spanish translation.
* po/pr_BR.po: Updated Brazilian Portuguese translation.
2002-07-23 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2002-07-23 11:58:05 +02:00
2002-07-23 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.
* po/pr_BR.po: New Brazilian Portuguese translation.
* po/id.po: Updated Indonesian translation.
2002-07-23 11:58:05 +02:00
* configure.in (LINGUAS): Add pr_BR.
* configure: Regenerate.
2002-07-19 09:52:40 +02:00
2002-07-18 Denis Chertykov <denisc@overta.ru>
Frank Ch. Eigler <fche@redhat.com>
Alan Lehotsky <alehotsky@cygnus.com>
matthew green <mrg@redhat.com>
* configure.in: Add support for ip2k.
* configure: Regenerate.
* Makefile.am: Add support for ip2k.
* Makefile.in: Regenerate.
* disassemble.c: Add support for ip2k.
* ip2k-asm.c: New generated file.
* ip2k-desc.c: New generated file.
* ip2k-desc.h: New generated file.
* ip2k-dis.c: New generated file.
* ip2k-ibld.c: New generated file.
* ip2k-opc.c: New generated file.
* ip2k-opc.h: New generated file.
2002-07-17 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-b.c (bWhc): New macro.
(mWhc): Ditto.
(OpPaWhcD): Ditto.
(ia64_opcodes_b): Correct patterns for indirect call
instructions to use 3-bit "wh" field.
* ia64-asmtab.c: Regnerate.
2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
2002-06-18 Dave Brolley <brolley@redhat.com>
* po/POTFILES.in: Add frv-*.[ch].
* disassemble.c (ARCH_frv): New macro.
(disassembler): Handle bfd_arch_frv.
* configure.in: Support frv_bfd_arch.
* Makefile.am (HFILES): Add frv-*.h.
(CFILES): Add frv-*.c
(ALL_MACHINES): Add frv-*.lo.
(CLEANFILES): Add stamp-frv.
(FRV_DEPS): New variable.
(stamp-frv): New target.
(frv-asm.lo): New target.
(frv-desc.lo): New target.
(frv-dis.lo): New target.
(frv-ibld.lo): New target.
(frv-opc.lo): New target.
(frv-*.[ch]): New files.
2002-06-18 Ben Elliston <bje@redhat.com>
* Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
* Makefile.in: Regenerate.
2002-06-08 Alan Modra <amodra@bigpond.net.au>
* a29k-dis.c: Replace CONST with const.
* h8300-dis.c: Likewise.
* m68k-dis.c: Likewise.
* or32-dis.c: Likewise.
* sparc-dis.c: Likewise.
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 04:57:44 +02:00
2002-06-04 Jason Thorpe <thorpej@wasabisystems.com>
* configure.in: Add "sh5*-*" to list of targets which include
sh64 support.
* configure: Regenerate.
2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c: Clean up a few whitespace issues, and sort a
few entries understanding that 'x' follows 'w' in the alphabet.
2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-opc.c: Add support for SB-1 MDMX subset and extensions.
2002-05-31 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
[ gas/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-31 03:17:18 +02:00
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
[ gas/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-31 03:17:18 +02:00
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
[ gas/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-31 03:17:18 +02:00
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
2002-05-30 17:25:37 +02:00
2002-05-30 Diego Novillo <dnovillo@redhat.com>
* d10v-opc.c (d10v_opcodes): `btsti' does not modify its
arguments.
2002-05-30 17:25:37 +02:00
2002-05-28 16:08:47 +02:00
2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
* configure.in: Add DLX configuraton support.
* configure: Regenerate.
* Makefile.am: Add DLX configuraton support.
* Makefile.in: Regenerate.
* disassemble.c: Add DLX support.
* dlx-dis.c: New file.
2002-05-25 Alan Modra <amodra@bigpond.net.au>
* Makefile.am (sh-dis.lo): Don't put make commands in deps.
* Makefile.in: Regenerate.
* arc-dis.c: Use #include "" instead of <> for local header files.
* m68k-dis.c: Likewise.
2002-07-25 12:31:28 +02:00
2002-05-22 J"orn Rennecke <joern.rennecke@superh.com>
* Makefile.am (sh-dis.lo): Compile with @archdefs@.
* Makefile.in: regenerate.
* sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
for disassembly.
? gas/testsuite/gas/mips/rol64.d ? gas/testsuite/gas/mips/rol64.s Index: gas/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/ChangeLog,v retrieving revision 1.1334 diff -u -p -r1.1334 ChangeLog --- gas/ChangeLog 21 May 2002 20:01:51 -0000 1.1334 +++ gas/ChangeLog 21 May 2002 23:32:51 -0000 @@ -1,3 +1,8 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (macro2): Add 64 bit drol, dror macros. + Optimize the rotate by zero case. + 2002-05-21 Nick Clifton <nickc@cambridge.redhat.com> * configure.in: Remove accidental enabling of bfd_gas=yes for Index: gas/config/tc-mips.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-mips.c,v retrieving revision 1.123 diff -u -p -r1.123 tc-mips.c --- gas/config/tc-mips.c 14 May 2002 23:35:59 -0000 1.123 +++ gas/config/tc-mips.c 21 May 2002 23:32:52 -0000 @@ -6686,6 +6686,17 @@ macro2 (ip) --mips_opts.noreorder; break; + case M_DROL: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + break; + case M_ROL: macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); @@ -6697,15 +6708,55 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROL_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + l = (rot < 0x20) ? "dsll" : "dsll32"; + r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROL_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + + case M_DROR: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); break; case M_ROR: @@ -6719,15 +6770,44 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROR_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + r = (rot < 0x20) ? "dsrl" : "dsrl32"; + l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROR_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } break; case M_S_DOB: Index: gas/testsuite/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v retrieving revision 1.315 diff -u -p -r1.315 ChangeLog --- gas/testsuite/ChangeLog 20 May 2002 17:05:34 -0000 1.315 +++ gas/testsuite/ChangeLog 21 May 2002 23:32:54 -0000 @@ -1,3 +1,9 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * gas/mips/rol64.s: New file, test of drol, dror macros. + * gas/mips/rol64.d: Likewise. + * gas/mips/mips.exp: Add new test. + 2002-05-20 Nick Clifton <nickc@cambridge.redhat.com> * gas/arm/arm.exp: Replace deprecated command line switches Index: gas/testsuite/gas/mips/mips.exp =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v retrieving revision 1.32 diff -u -p -r1.32 mips.exp --- gas/testsuite/gas/mips/mips.exp 4 Apr 2002 08:23:30 -0000 1.32 +++ gas/testsuite/gas/mips/mips.exp 21 May 2002 23:32:54 -0000 @@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then { run_dump_test "mul" } run_dump_test "rol" + run_dump_test "rol64" if !$aout { run_dump_test "sb" } run_dump_test "trunc" if !$aout { run_dump_test "ulh" } Index: include/opcode/ChangeLog =================================================================== RCS file: /cvs/src/src/include/opcode/ChangeLog,v retrieving revision 1.167 diff -u -p -r1.167 ChangeLog --- include/opcode/ChangeLog 17 May 2002 19:01:03 -0000 1.167 +++ include/opcode/ChangeLog 21 May 2002 23:32:57 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases. + 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com> * h8300.h: Corrected defs of all control regs Index: include/opcode/mips.h =================================================================== RCS file: /cvs/src/src/include/opcode/mips.h,v retrieving revision 1.24 diff -u -p -r1.24 mips.h --- include/opcode/mips.h 16 Mar 2002 03:09:18 -0000 1.24 +++ include/opcode/mips.h 21 May 2002 23:32:57 -0000 @@ -526,9 +526,13 @@ enum M_REM_3I, M_REMU_3, M_REMU_3I, + M_DROL, M_ROL, + M_DROL_I, M_ROL_I, + M_DROR, M_ROR, + M_DROR_I, M_ROR_I, M_S_DA, M_S_DOB, Index: opcodes/ChangeLog =================================================================== RCS file: /cvs/src/src/opcodes/ChangeLog,v retrieving revision 1.447 diff -u -p -r1.447 ChangeLog --- opcodes/ChangeLog 17 May 2002 14:36:45 -0000 1.447 +++ opcodes/ChangeLog 21 May 2002 23:33:00 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros. + Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com> * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. Index: opcodes/mips-opc.c =================================================================== RCS file: /cvs/src/src/opcodes/mips-opc.c,v retrieving revision 1.32 diff -u -p -r1.32 mips-opc.c --- opcodes/mips-opc.c 17 Mar 2002 02:42:25 -0000 1.32 +++ opcodes/mips-opc.c 21 May 2002 23:33:00 -0000 @@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 }, {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 }, {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 }, +{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 }, +{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 }, +{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 }, +{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 }, {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
2002-05-22 01:54:48 +02:00
2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
2002-07-25 12:31:28 +02:00
2002-05-17 J"orn Rennecke <joern.rennecke@superh.com>
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
* sh-dis.c (LITTLE_BIT): Delete.
(print_insn_sh, print_insn_shl): Deleted.
(print_insn_shx): Renamed to
(print_insn_sh). No longer static. Handle SHmedia instructions.
Use info->endian to determine endianness.
* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
(print_insn_sh64x): No longer static. Renamed to
(print_insn_sh64). Removed pfun_compact and endian arguments.
If we got an uneven address to indicate SHmedia, adjust it.
Return -2 for SHcompact instructions.
2002-05-17 Alan Modra <amodra@bigpond.net.au>
* acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
* configure.in: Invoke AM_INSTALL_LIBBFD.
* Makefile.am (install-data-local): Move to..
(install_libopcodes): .. New target.
(uninstall_libopcodes): Likewise.
(install-bfdlibLTLIBRARIES): Likewise.
(uninstall-bfdlibLTLIBRARIES): Likewise.
(bfdlibdir): New.
(bfdincludedir): New.
(lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
2002-05-15 22:54:50 +02:00
2002-05-15 Nick Clifton <nickc@cambridge.redhat.com>
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-dis.c: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-dis.c: Regenerate.
* openrisc-asm.c: Regenerate.
* openrisc-desc.c: Regenerate.
* openrisc-dis.c: Regenerate.
* xstormy16-asm.c: Regenerate.
* xstormy16-desc.c: Regenerate.
* xstormy16-dis.c: Regenerate.
2002-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (is_newabi): EABI is not a NewABI.
2002-05-13 Jason Thorpe <thorpej@wasabisystems.com>
* configure.in (shle-*-*elf*): Include sh64 support.
* configure: Regenerate.
2002-04-28 Jason Thorpe <thorpej@wasabisystems.com>
* vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
(print_insn_mode): Print some basic info about floating point values.
2002-05-09 13:15:47 +02:00
2002-05-09 Anton Blanchard <anton@samba.org>
* ppc-opc.c: Add "tlbiel" for POWER4.
2002-05-07 Graydon Hoare <graydon@redhat.com>
* cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
than just most-recently-opened.
2002-05-01 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
2002-04-24 Christian Groessler <chris@groessler.org>
* z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
codes.
(z8k_lookup_instr): CLASS_IGNORE case added.
(output_instr): Don't print hex codes, they are already
printed.
(unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
(unparse_instr): Fix base and indexed addressing disassembly:
The index is inside the brackets.
* z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
(opt): Fix shift left/right arithmetic/logical byte defines:
The high byte of the immediate word is ignored by the
processor.
Fix n parameter of ldm opcodes: The opcode contains (n-1).
(args): Fix "n" entry.
(toks): Add "nim4" and "iiii" entries.
* z8k-opc.h: Regenerated with new z8kgen.c.
2002-04-24 11:01:51 +02:00
2002-04-24 Nick Clifton <nickc@cambridge.redhat.com>
* po/id.po: New Indonesian translation.
* configure.in (ALL_LIGUAS): Add id.po
* configure: Regenerate.
2002-04-17 matthew green <mrg@redhat.com>
* ppc-opc.c (powerpc_opcode): Fix dssall operand list.
2002-04-04 Alan Modra <amodra@bigpond.net.au>
* dep-in.sed: Cope with absolute paths.
* Makefile.am (dep.sed): Subst TOPDIR.
Run "make dep-am".
* Makefile.in: Regenerate.
* ppc-opc.c: Whitespace.
* s390-dis.c: Fix copyright date.
2002-03-23 matthew green <mrg@redhat.com>
* ppc-opc.c (vmaddfp): Fix operand order.
2002-03-21 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2002-03-21 Anton Blanchard <anton@samba.org>
* ppc-opc.c: Add optional field to mtmsrd.
(MTMSRD_L, XRLARB_MASK): Define.
2002-07-25 12:31:28 +02:00
2002-03-18 Jan Hubicka <jh@suse.cz>
* i386-dis.c (prefix_name): Fix handling of 32bit address prefix
in 64bit mode.
(print_insn) Likewise.
(putop): Fix handling of 'E'
(OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
(ptr_reg): Likewise.
2002-03-18 10:44:22 +01:00
2002-03-18 Nick Clifton <nickc@cambridge.redhat.com>
* po/fr.po: Updated version.
2002-03-16 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (M3D): Tweak comment.
(mips_builtin_op): Add comment indicating that opcodes of the
same name must be placed together in the table, and sort
the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
"rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
2002-03-16 09:55:53 +01:00
2002-03-16 Nick Clifton <nickc@cambridge.redhat.com>
* Makefile.am: Tidy up sh64 rules.
* Makefile.in: Regenerate.
2002-03-16 09:55:53 +01:00
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c: Update copyright years.
[ gas/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
2002-03-16 04:09:19 +01:00
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
indicate that they should dissassemble all applicable
MIPS-specified ASEs.
* mips-opc.c: Add support for MIPS-3D instructions.
(M3D): New definition.
* mips-opc.c: Update copyright years.
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
2002-03-15 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (is_newabi): Fix ABI decoding.
2002-03-14 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
and bfd_mach_mipsisa64 cases to match the rest.
2002-03-13 11:35:17 +01:00
2002-03-13 Nick Clifton <nickc@cambridge.redhat.com>
* po/fr.po: Updated version.
2002-03-13 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Add optional `L' field to tlbie.
(XRTLRA_MASK): Define.
2002-03-06 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
present on I4.
* mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
2002-03-05 Paul Koning <pkoning@equallogic.com>
* pdp11-opc.c: Fix "mark" operand type. Fix operand types
for float opcodes that take float operands. Add alternate
names (xxxD vs. xxxF) for float opcodes.
* pdp11-dis.c (print_operand): Clean up formatting for mode 67.
(print_foperand): New function to handle float opcode operands.
(print_insn_pdp11): Use print_foperand to disassemble float ops.
2002-02-27 17:37:48 +01:00
2002-02-27 Nick Clifton <nickc@cambridge.redhat.com>
* po/de.po: Updated.
2002-02-26 23:09:26 +01:00
2002-02-26 Brian Gaeke <brg@dgate.org>
* Makefile.am (install-data-local): Install dis-asm.h.
2002-02-26 Nick Clifton <nickc@cambridge.redhat.com>
* configure.in (LINGUAS): Add de.po.
* configure: Regenerate.
* po/de.po: New file.
2002-02-25 Alan Modra <amodra@bigpond.net.au>
* ppc-dis.c (powerpc_dialect): Handle power4 option.
* ppc-opc.c (insert_bdm): Correct description of "at" branch
hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
(PPCCOM32, PPCCOM64): Delete.
(NOPOWER4, POWER4): Define.
(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
are enabled for power4 rather than ppc64.
2002-02-20 Tom Rix <trix@redhat.com>
* ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Use renamed architecture defines.
2002-02-19 matthew green <mrg@redhat.com>
* ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
specific.
2002-02-18 09:40:03 +01:00
2002-02-18 Nick Clifton <nickc@cambridge.redhat.com>
* po/tr.po: Updated translation.
2002-02-15 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
disassembly mask.
2002-02-15 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Add simple pseudos for
lda, ldah, jmp, ret.
2002-02-14 16:06:41 +01:00
2002-02-14 Nick Clifton <nickc@cambridge.redhat.com>
* po/da.po: Updated translation.
2002-02-12 Graydon Hoare <graydon@redhat.com>
* cgen-asm.in (parse_insn_normal): Change call from
@arch@_cgen_parse_operand to cd->parse_operand, to
facilitate CGEN_ASM_INIT_HOOK doing useful work.
2002-02-11 Alexandre Oliva <aoliva@redhat.com>
* sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
sign-extended.
2002-02-11 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: "make dep-am".
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
2002-02-10 Hans-Peter Nilsson <hp@bitrange.com>
* configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
shl-*-linux*.
* configure: Regenerate.
2002-02-10 Daniel Jacobowitz <drow@mvista.com>
* cgen-dis.c: Add prototypes for count_decodable_bits
and add_insn_to_hash_chain.
2002-02-08 Alexandre Oliva <aoliva@redhat.com>
* configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
* configure: Rebuilt.
2002-02-08 13:12:15 +01:00
2002-02-08 Ivan Guzvinec <ivang@opencores.org>
* or32-opc.c: Fix compile time warning messages.
* or32-dis.c: Fix compile time warning messages.
Contribute sh64-elf. 2001-10-08 Nick Clifton <nickc@cambridge.redhat.com> * sh64-opc.c: Regenerate. 2001-03-13 DJ Delorie <dj@redhat.com> * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its purpose is more obvious. * sh64-opc.c (shmedia_table): Ditto. * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto. (print_insn_shmedia): Ditto. 2001-03-12 DJ Delorie <dj@redhat.com> * sh64-opc.c: Adjust comments to reflect reality: replace bits 3:0 with zeros (not "reserved"), replace "rrrrrr" with "gggggg" for two-operand floating point opcodes. Remove "fsina". 2001-01-08 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>: Correct printing of .byte:s. Return number of printed bytes or -1; never 0. (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s to next four-byte-alignment if insn or data is not aligned. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c: Update comments and fix comment formatting. (initialize_shmedia_opcode_mask_table) <case A_IMMM>: Abort instead of setting length to 0. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl, sh64_get_contents_type, sh64_address_in_cranges): Move to bfd/elf32-sh64.c. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.c: Remove #if 0:d entries for instructions not found in SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed address with same prefix as SHcompact. In the disassembler, use a .cranges section for linked executables. * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file and update for using structure in info->private_data. (struct sh64_disassemble_info): New. (is_shmedia_p): Delete. (crange_qsort_cmpb): New function. (crange_qsort_cmpl, crange_bsearch_cmpb): New functions. (crange_bsearch_cmpl, sh64_address_in_cranges): New functions. (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions. (sh64_get_contents_type, sh64_address_is_shmedia): New functions. (print_insn_shmedia): Correct displaying of address after MOVI/SHORI pair. Display addresses for linked executables only. (print_insn_sh64x_media): Initialize info->private_data by calling init_sh64_disasm_info. (print_insn_sh64x): Ditto. Find out type of contents by calling sh64_contents_type_disasm. Display data regions using ".long" and ".byte" similar to unrecognized opcodes. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA information in section flags before considering symbols. Don't assume an info->mach setting of bfd_mach_sh5 means SHmedia code. * configure.in (bfd_sh_arch): Check presence of sh64 insns by matching $target $canon_targets instead of looking at the now-removed -DINCLUDE_SHMEDIA in $targ_cflags. * configure: Regenerate. 2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.c (shmedia_creg_table): New. * sh64-opc.h (shmedia_creg_info): New type. (shmedia_creg_table): Declare. * sh64-dis.c (creg_name): New function. (print_insn_shmedia): Use it. * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to print_insn_sh64 if big-endian and to print_insn_sh64l if little-endian. * sh64-dis.c (print_insn_shmedia): Make r unsigned. (print_insn_sh64l): New. (print_insn_sh64x): New. (print_insn_sh64x_media): New. (print_insn_sh64): Break out code to print_insn_sh64x and print_insn_sh64x_media. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.h: New file * sh64-opc.c: New file * sh64-dis.c: New file * Makefile.am: Add sh64 targets. (HFILES): Add sh64-opc.h. (CFILES): Add sh64-opc.c and sh64-dis.c. (ALL_MACHINES): Add sh64 files. * Makefile.in: Regenerate. * configure.in: Add support for sh64 to bfd_sh_arch. * configure: Regenerate. * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define. (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to print_insn_sh64. * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4. * po/POTFILES.in: Regenerate. * po/opcodes.pot: Regenerate.
2002-02-08 06:51:04 +01:00
2002-02-08 Alexandre Oliva <aoliva@redhat.com>
Contribute sh64-elf.
2001-10-08 Nick Clifton <nickc@cambridge.redhat.com>
* sh64-opc.c: Regenerate.
2001-03-13 DJ Delorie <dj@redhat.com>
* sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
purpose is more obvious.
* sh64-opc.c (shmedia_table): Ditto.
* sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
(print_insn_shmedia): Ditto.
2001-03-12 DJ Delorie <dj@redhat.com>
* sh64-opc.c: Adjust comments to reflect reality: replace bits
3:0 with zeros (not "reserved"), replace "rrrrrr" with
"gggggg" for two-operand floating point opcodes. Remove
"fsina".
2001-01-08 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
Correct printing of .byte:s. Return number of printed bytes or
-1; never 0.
(print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s
to next four-byte-alignment if insn or data is not aligned.
2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-dis.c: Update comments and fix comment formatting.
(initialize_shmedia_opcode_mask_table) <case A_IMMM>:
Abort instead of setting length to 0.
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
crange_bsearch_cmpl, sh64_get_contents_type,
sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-opc.c: Remove #if 0:d entries for instructions not found in
SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
address with same prefix as SHcompact.
In the disassembler, use a .cranges section for linked executables.
* sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
and update for using structure in info->private_data.
(struct sh64_disassemble_info): New.
(is_shmedia_p): Delete.
(crange_qsort_cmpb): New function.
(crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
(crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
(init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
(sh64_get_contents_type, sh64_address_is_shmedia): New functions.
(print_insn_shmedia): Correct displaying of address after MOVI/SHORI
pair. Display addresses for linked executables only.
(print_insn_sh64x_media): Initialize info->private_data by calling
init_sh64_disasm_info.
(print_insn_sh64x): Ditto. Find out type of contents by calling
sh64_contents_type_disasm. Display data regions using ".long" and
".byte" similar to unrecognized opcodes.
2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
information in section flags before considering symbols. Don't
assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
* configure.in (bfd_sh_arch): Check presence of sh64 insns by
matching $target $canon_targets instead of looking at the
now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
* configure: Regenerate.
2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-opc.c (shmedia_creg_table): New.
* sh64-opc.h (shmedia_creg_info): New type.
(shmedia_creg_table): Declare.
* sh64-dis.c (creg_name): New function.
(print_insn_shmedia): Use it.
* disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
bfd_mach_sh5 to print_insn_sh64 if big-endian and to
print_insn_sh64l if little-endian.
* sh64-dis.c (print_insn_shmedia): Make r unsigned.
(print_insn_sh64l): New.
(print_insn_sh64x): New.
(print_insn_sh64x_media): New.
(print_insn_sh64): Break out code to print_insn_sh64x and
print_insn_sh64x_media.
2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com>
* sh64-opc.h: New file
* sh64-opc.c: New file
* sh64-dis.c: New file
* Makefile.am: Add sh64 targets.
(HFILES): Add sh64-opc.h.
(CFILES): Add sh64-opc.c and sh64-dis.c.
(ALL_MACHINES): Add sh64 files.
* Makefile.in: Regenerate.
* configure.in: Add support for sh64 to bfd_sh_arch.
* configure: Regenerate.
* disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
(disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
print_insn_sh64.
* sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2002-02-04 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
2002-02-04 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
2002-02-01 04:26:35 +01:00
2002-02-01 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am"
* Makefile.in: Regenerate.
2002-01-31 Ivan Guzvinec <ivang@opencores.org>
* or32-dis.c: New file.
* or32-opc.c: New file.
* configure.in: Add support for or32.
* configure: Regenerate.
* Makefile.am: Add support for or32.
* Makefile.in: Regenerate.
* disassemble.c: Add support for or32.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2002-01-27 Daniel Jacobowitz <drow@mvista.com>
* configure: Regenerated.
2002-01-26 09:52:51 +01:00
2002-01-26 Nick Clifton <nickc@cambridge.redhat.com>
* po/fr.po: Updated version.
2002-01-25 15:25:03 +01:00
2002-01-25 Nick Clifton <nickc@cambridge.redhat.com>
* po/es.po: Updated version.
2002-01-24 16:20:00 +01:00
2002-01-24 Nick Clifton <nickc@cambridge.redhat.com>
* po/da.po: New version.
2002-01-23 12:48:53 +01:00
2002-01-23 Nick Clifton <nickc@cambridge.redhat.com>
* po/da.po: New file: Spanish translation.
* configure.in (ALL_LINGUAS): Add da.
* configure: Regenerate.
2002-01-22 Graydon Hoare <graydon@redhat.com>
* fr30-asm.c: Regenerate.
* fr30-desc.c: Likewise.
* fr30-desc.h: Likewise.
* fr30-dis.c: Likewise.
* fr30-ibld.c: Likewise.
* fr30-opc.c: Likewise.
* fr30-opc.h: Likewise.
* m32r-asm.c: Likewise.
* m32r-desc.c: Likewise.
* m32r-desc.h: Likewise.
* m32r-dis.c: Likewise.
* m32r-ibld.c: Likewise.
* m32r-opc.c: Likewise.
* m32r-opc.h: Likewise.
* m32r-opinst.c: Likewise.
* openrisc-asm.c: Likewise.
* openrisc-desc.c: Likewise.
* openrisc-desc.h: Likewise.
* openrisc-dis.c: Likewise.
* openrisc-ibld.c: Likewise.
* openrisc-opc.c: Likewise.
* openrisc-opc.h: Likewise.
* xstormy16-desc.c: Likewise.
2002-01-22 Richard Henderson <rth@redhat.com>
* alpha-dis.c (print_insn_alpha): Also mask the base opcode for
comparison.
2002-01-22 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2002-01-19 Richard Earnshaw <rearnsha@arm.com>
* arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
* arm-dis.c (print_insn_arm): Don't handle 'h' case.
2002-01-18 Keith Walker <keith.walker@arm.com>
* arm-opc.h (arm_opcodes): Add bxj instruction.
2002-01-17 15:12:08 +01:00
2002-01-17 Nick Clifton <nickc@cambridge.redhat.com>
* po/opcodes.pot: Regenerate.
* po/fr.po: Regenerate.
* po/sv.po: Regenerate.
* po/tr.po: Regenerate.
2002-01-16 11:17:48 +01:00
2002-01-16 Nick Clifton <nickc@cambridge.redhat.com>
* po/tr.po: Import new version.
2002-01-15 Richard Earnshaw <rearnsha@arm.com>
* arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
VFP bitfields.
2002-01-10 matthew green <mrg@redhat.com>
* xstormy16-asm.c: Regenerate.
* xstormy16-desc.c: Likewise.
* xstormy16-desc.h: Likewise.
* xstormy16-dis.c: Likewise.
* xstormy16-opc.c: Likewise.
* xstormy16-opc.h: Likewise.
2002-01-07 18:37:59 +01:00
2002-01-07 Nick Clifton <nickc@cambridge.redhat.com>
* po/es.po: New file: Spanish translation.
* configure.in (ALL_LINGUAS): Add es.
* configure: Regenerate.
2001-12-31 Jeffrey A Law (law@redhat.com)
* hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
'X', 'M', and 'A'. No longer emit a space after 'x' or 's'.
Always emit a space after 'H'.
2001-12-18 matthew green <mrg@redhat.com>
* ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY.
2001-12-17 Richard Henderson <rth@redhat.com>
* alpha-opc.c (unop): Encode with RB as $sp.
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
2001-12-08 04:46:03 +01:00
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerate.
* configure.in: Add support for xstormy16.
* configure: Regenerate.
* disassemble.c: Add support for xstormy16.
* xstormy16-asm.c: New generated file.
* xstormy16-desc.c: New generated file.
* xstormy16-desc.h: New generated file.
* xstormy16-dis.c: New generated file.
* xstormy16-ibld.c: New generated file.
* xstormy16-opc.c: New generated file.
* xstormy16-opc.h: New generated file.
2001-12-06 Richard Henderson <rth@redhat.com>
* alpha-opc.c (alpha_opcodes): Add wh64en.
2001-12-04 Alexandre Oliva <aoliva@redhat.com>
* d10v-opc.c (d10v_predefined_registers): Remove warnings
introduced in Nov 29's patch.
* d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
unmatched register.
* d10v-dis.c (print_operand): Disregard OPERAND_SP in register
predefined value.
* d10v-opc.c (RSRC_NOSP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
2001-11-29 Alexandre Oliva <aoliva@redhat.com>
* d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
(RSRC_SP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
2001-11-23 Lars Brinkhoff <lars@nocrew.org>
* pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
Also, break out of the loop as soon as an instruction has been
printed.
2001-11-17 matthew green <mrg@redhat.com>
* ppc-opc.c (mfvrsave, mtvrsave): New instructions.
binutils/ChangeLog * doc/binutils.texi (objdump): Document ppc -M options. gas/ChangeLog * config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size) to operand->insert. (md_assemble): Likewise. gas/testsuite/ChangeLog * gas/ppc/booke.d: Modify reloc and target matches for powerpc64. include/opcode/ChangeLog * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param. opcodes/ChangeLog * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC. (insert_bat, extract_bat, insert_bba, extract_bba, insert_bd, extract_bd, insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo, insert_bo, extract_bo, insert_boe, extract_boe, insert_ds, extract_ds, insert_de, extract_de, insert_des, extract_des, insert_li, extract_li, insert_mbe, extract_mbe, insert_mb6, extract_mb6, insert_nb, extract_nb, insert_nsi, extract_nsi, insert_ral, insert_ram, insert_ras, insert_rbs, extract_rbs, insert_sh6, extract_sh6, insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param. (extract_bd, extract_bdm, extract_bdp, extract_ds, extract_des, extract_li, extract_nsi): Implement sign extension without conditional. (insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints. (extract_bdm, extract_bdp): Correct 32 bit validation. (AT1_MASK, AT2_MASK): Define. (BBOAT_MASK): Define. (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define. (BOFM64, BOFP64, BOTM64, BOTP64): Define. (BODNZM64, BODNZP64, BODZM64, BODZP64): Define. (PPCCOM32, PPCCOM64): Define. (powerpc_opcodes): Modify existing 32 bit insns with branch hints and add new patterns to implement 64 bit branches with hints. Move booke instructions so they match before ppc64. * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for 64 bit default targets, and parse "32" and "64" in options. Formatting fixes. (print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 02:08:53 +01:00
2001-11-15 Alan Modra <amodra@bigpond.net.au>
2001-11-15 13:27:07 +01:00
* po/POTFILES.in: Regenerate.
binutils/ChangeLog * doc/binutils.texi (objdump): Document ppc -M options. gas/ChangeLog * config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size) to operand->insert. (md_assemble): Likewise. gas/testsuite/ChangeLog * gas/ppc/booke.d: Modify reloc and target matches for powerpc64. include/opcode/ChangeLog * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param. opcodes/ChangeLog * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC. (insert_bat, extract_bat, insert_bba, extract_bba, insert_bd, extract_bd, insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo, insert_bo, extract_bo, insert_boe, extract_boe, insert_ds, extract_ds, insert_de, extract_de, insert_des, extract_des, insert_li, extract_li, insert_mbe, extract_mbe, insert_mb6, extract_mb6, insert_nb, extract_nb, insert_nsi, extract_nsi, insert_ral, insert_ram, insert_ras, insert_rbs, extract_rbs, insert_sh6, extract_sh6, insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param. (extract_bd, extract_bdm, extract_bdp, extract_ds, extract_des, extract_li, extract_nsi): Implement sign extension without conditional. (insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints. (extract_bdm, extract_bdp): Correct 32 bit validation. (AT1_MASK, AT2_MASK): Define. (BBOAT_MASK): Define. (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define. (BOFM64, BOFP64, BOTM64, BOTP64): Define. (BODNZM64, BODNZP64, BODZM64, BODZP64): Define. (PPCCOM32, PPCCOM64): Define. (powerpc_opcodes): Modify existing 32 bit insns with branch hints and add new patterns to implement 64 bit branches with hints. Move booke instructions so they match before ppc64. * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for 64 bit default targets, and parse "32" and "64" in options. Formatting fixes. (print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 02:08:53 +01:00
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-14 Dave Brolley <brolley@redhat.com>
* cgen-dis.c (count_decodable_bits): New function.
(add_insn_to_hash_chain): New function.
(hash_insn_array): Call add_insn_to_hash_chain.
(hash_insn_list): Call add_insn_to_hash_chain.
* m32r-dis.c: Regenerated.
* fr30-dis.c: Regenerated.
2001-11-14 Andreas Jaeger <aj@suse.de>
* i386-dis.c (print_insn): Use x86-64 as option.
2001-11-14 Alan Modra <amodra@bigpond.net.au>
* disassemble.c (disassembler): Call print_insn_i386.
* i386-dis.c (SUFFIX_ALWAYS): Define.
(struct dis_private): Add orig_sizeflag.
(print_insn_i386): Make it a wrapper, calling..
(print_insn): ..The old body of print_insn_i386. Avoid longjmp
warning without using volatile by moving orig_sizeflag to priv,
and removing inbuf. Parse disassembler_options.
(print_insn_i386_att, print_insn_i386_intel): Move initialisation
code to print_insn.
(putop): Remove #ifdef SUFFIX_ALWAYS.
2001-11-11 Timothy Wall <twall@alum.mit.edu>
* tic54x-dis.c: Use revised opcode structure. Export opcode
template lookup.
(has_lkaddr): Don't forget about Lmem insns.
* tic54x-opc.c: Add emulation trap. Parallel table now uses
standard opcode templates.
2001-11-13 Zack Weinberg <zack@codesourcery.com>
* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
category instead of Ew.
2001-11-12 17:36:06 +01:00
2001-11-12 Niraj Gupta <ngupta@zumanetworks.com>
* m68k-opc.c: Fix definitions of wddata[bwl].
2001-11-09 Richard Sandiford <rsandifo@redhat.com>
* cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
fit in the buffer, try to match the empty keyword.
2001-11-09 11:21:22 +01:00
2001-11-09 Nick Clifton <nickc@cambridge.redhat.com>
* cgen-ibld.in (extract_1): Fix badly placed #if 0.
* fr30-ibld.c: Regenerate.
* m32r-ibld.c: Regenerate.
* openrisc-ibld.c: Regenerate.
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (print_insn_mips): Remove spaces at end of line.
2001-11-02 20:09:06 +01:00
2001-11-02 Nick Clifton <nickc@cambridge.redhat.com>
* configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr".
* configure: Regernate.
* po/fr.po: New file.
* po/sv.po: New file.
* po/tr.po: New file.
2001-11-01 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* m68hc11-dis.c (print_insn): Fix disassembly of movb with a
constant as source.
2001-10-30 16:20:14 +01:00
2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
* Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate
dependencies.
* Makefile.in: Regenerate.
* mmix-dis.c, mmix-opc.c: New files.
2001-10-29 23:43:32 +01:00
2001-10-29 Kazu Hirata <kazu@hxi.com>
* d30v-dis.c: Fix a comment typo.
2001-10-23 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
"bltzall" as writing GPR 31 (since they do).
* mips-dis.c (print_insn_arg): Calculate info->target
where appropriate.
(print_insn_mips): Fill in instruction info.
(print_mips16_insn_arg): Remove unneded variable 'val'.
Removed duplicated instruction target calculations,
calculate once and print that result. Use same idiom for
masking the jump segment bits as is used in print_insn_arg.
2001-10-20 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c (CT): Make it an optional operand.
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
2001-10-17 matthew green <mrg@redhat.com>
* ppc-opc.c (STRM): New AltiVec operand.
(XDSS): New AltiVec instruction form.
(mtvscr): Correct operand list.
(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
2001-10-17 07:41:53 +02:00
2001-10-17 Alan Modra <amodra@bigpond.net.au>
* po/POTFILES.in: Regenerate.
2001-10-13 matthew green <mrg@redhat.com>
* ppc-opc.c (MO): New macro for MO field of mbar instruction.
(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
2001-10-13 11:38:04 +02:00
2001-10-13 Nick Clifton <nickc@cambridge.redhat.com>
* cgen-ibld.in: Include safe-ctype.h in preference to
ctype.h.
* cgen-asm.in: Include safe-ctype.h in preference to
ctype.h. Fix formatting. Use ISSPACE instead of isspace and
TOLOWER instead of tolower.
(@arch@_cgen_build_insn_regex): Remove duplication of syntax
2001-10-13 11:38:04 +02:00
string elements in constructed regular expression.
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-ibld.c: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-ibld.c: Regenerate.
* openrisc-asm.c: Regenerate.
* openrisc-desc.c: Regenerate.
* openrisc-ibld.c: Regenerate.
* po/opcodes.pot: Regenerate.
[gas/ChangeLog] * config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455 flags, equivalent to -m7400. New -maltivec to enable AltiVec instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable 64-bit and 32-bit BookE support, respectively. Change -m403 and -m405 to set PPC403 option. (md_show_usage): Adjust for new options. * doc/all.texi: Set PPC. * doc/as.texinfo: Add PPC support and pull in c-ppc.texi. * doc/c-ppc.texi: New file. * doc/Makefile.am (CPU_DOCS): Add c-ppc.texi. * doc/Makefile.in: Regenerate. [gas/testsuite/ChangeLog] * gas/ppc/booke.s: New test for Motorola BookE. * gas/ppc/booke.d: New file. * gas/ppc/ppc.exp: Test booke.s. [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for BookE and PowerPC403 instructions. [opcodes/ChangeLog] * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New instruction field instruction/extraction functions for new BookE DE form instructions. (CT): New macro for CT field in an X form instruction. (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form instructions. (PPC64): Don't include PPC_OPCODE_PPC. (403): New opcode macro for PPC403 processors. (BOOKE): New opcode macro for BookE processors. (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions. (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise. (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise. (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise. (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise. (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise. (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise. (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise. (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise. (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise. (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise. (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise. (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise. (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise. * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look for a disassembler option of `booke', `booke32' or `booke64' to enable BookE support in the disassembler.
2001-10-13 03:59:09 +02:00
2001-10-12 matthew green <mrg@redhat.com>
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-12 John Healy <jhealy@redhat.com>
* cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
for the length when extracting the base part of the insn.
2001-10-09 Bruno Haible <haible@clisp.cons.org>
2001-10-09 19:25:58 +02:00
* cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive
regular expression. Fix some formatting problems.
* fr30-asm.c: Regenerate.
* openrisc-asm.c: Regenerate.
* m32r-asm.c: Regenerate.
2001-10-09 Christian Groessler <cpg@aladdin.de>
* z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly
of indirect register memory accesses to be same format the
assembler accepts.
2001-10-09 19:25:58 +02:00
2001-10-09 Nick Clifton <nickc@cambridge.redhat.com>
* sh-opc.h: Fix encoding of least significant nibble of the
DSP single data transfer instructions.
* sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
instructions.
2001-10-08 Nick Clifton <nickc@cambridge.redhat.com>
* cgen-asm.in: Fix compile time warning messages in generated
C files.
* cgen-dis.in: The same.
* cgen-ibld.in: The same.
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-ibld.c: Regenerate.
* fr30-opc.c: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-ibld.c: Regenerate.
* m32r-opc.c: Regenerate.
* m32r-opinst.c Regenerate.
* openrisc-asm.c: Regenerate.
* openrisc-desc.c: Regenerate.
* openrisc-dis.c: Regenerate.
* openrisc-ibld.c: Regenerate.
* openrisc-opc.c: Regenerate.
* openrisc-opc.h: Regenerate.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2001-10-08 Aldy Hernandez <aldyh@redhat.com>
* arm-opc.h (arm_opcodes): Add cirrus insns.
* arm-dis.c (print_insn_arm): Add 'I' case.
2001-10-03 Alan Modra <amodra@bigpond.net.au>
* po/POTFILES.in: Regenerate.
* configure: Regenerate.
2001-10-02 Alan Modra <amodra@bigpond.net.au>
* Makefile.am (Makefile): Depend on bfd/configure.in.
Run "make dep-am".
* Makefile.in: Regenerate.
2001-09-30 John Healy <jhealy@redhat.com>
* cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
calls to cgen_get_insn_value and cgen_put_insn_value calls.
(extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
2001-09-30 Hans-Peter Nilsson <hp@bitrange.com>
* Makefile.am: Update dependencies with "make dep-am".
* Makefile.in: Regenerate.
2001-09-26 Alan Modra <amodra@bigpond.net.au>
* arc-dis.c: Formatting fixes.
(my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
2001-09-21 Bruno Haible <haible@clisp.cons.org>
* arc-dis.c: Don't include <ctype.h>.
* openrisc-desc.c: Likewise.
* openrisc-ibld.c: Likewise.
2001-09-20 17:28:25 +02:00
2001-09-20 Nick Clifton <nickc@cambridge.redhat.com>
* fr30-opc.c: Fix compile time warning messages.
* i370-opc.c: Fix compile time warning messages.
* i960-dis.c: Fix compile time warning messages.
* m32r-asm.c: Fix compile time warning messages.
* m32r-desc.c: Fix compile time warning messages.
* m32r-dis.c: Fix compile time warning messages.
* m32r-ibld.c: Fix compile time warning messages.
* m32r-opc.c: Fix compile time warning messages.
* m32r-opinst.c: Fix compile time warning messages.
* ns32k-dis.c: Fix compile time warning messages.
* openrisc-asm.c: Fix compile time warning messages.
* openrisc-desc.c: Fix compile time warning messages.
* openrisc-dis.c: Fix compile time warning messages.
* openrisc-ibld.c: Fix compile time warning messages.
* openrisc-opc.c: Fix compile time warning messages.
* pdp11-dis.c: Fix compile time warning messages.
* tic54x-dis.c: Fix compile time warning messages.
* v850-opc.c: Fix compile time warning messages.
* vax-dis.c: Fix compile time warning messages.
* w65-opc.h: Fix compile time warning messages.
* z8k-opc.h: Fix compile time warning messages.
* z8kgen.c: Fix compile time warning messages.
2001-09-19 19:40:28 +02:00
2001-09-19 Nick Clifton <nickc@cambridge.redhat.com>
* arm-dis.c: Fix compile time warning messages.
* cgen-asm.c: Fix compile time warning messages.
* cgen-dis.c: Fix compile time warning messages.
* cris-dis.c: Fix compile time warning messages.
* d10v-dis.c: Fix compile time warning messages.
* fr30-asm.c: Fix compile time warning messages.
* fr30-desc.c: Fix compile time warning messages.
* fr30-dis.c: Fix compile time warning messages.
* fr30-ibld.c: Fix compile time warning messages.
2001-09-18 Bruno Haible <haible@clisp.cons.org>
* cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
(cgen_parse_keyword): Use ISALNUM instead of isalnum.
* cgen-opc.c: Include "safe-ctype.h" instead of <ctype.h>.
(cgen_keyword_lookup_name): Use ISALPHA/TOLOWER instead of
isalpha/tolower.
(cgen_keyword_add): Use ISALNUM instead of isalnum.
(hash_keyword_name): Use TOLOWER instead of tolower.
* fr30-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
(parse_insn_normal): Use TOLOWER/ISSPACE instead of
tolower/isspace.
(fr30_cgen_assemble_insn): Use ISSPACE instead of isspace.
* fr30-desc.c: Don't include <ctype.h>.
* fr30-ibld.c: Likewise.
* ia64-gen.c: Include "safe-ctype.h" instead of <ctype.h>.
(load_insn_classes, parse_resource_users, load_depfile): Use
ISSPACE instead of isspace.
* m32r-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
(parse_insn_normal): Use TOLOWER/ISSPACE instead of
tolower/isspace.
(m32r_cgen_assemble_insn): Use ISSPACE instead of isspace.
* m32r-desc.c: Don't include <ctype.h>.
* m32r-ibld.c: Likewise.
* openrisc-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
(parse_insn_normal): Use TOLOWER/ISSPACE instead of
tolower/isspace.
(openrisc_cgen_assemble_insn): Use ISSPACE instead of isspace.
2001-09-18 Martin Schwidefsky <schwidefsky@de.ibm.com>
* Makefile.am: Add rules and dependencies to create the s/390 opcode
table out of s390-opc.txt automatically.
* configure.in: Add BFD_CC_FOR_BUILD to allow CC_FOR_BUILD to be used.
* s390-mkopc.c (dumpTable): Change output to create a complete file.
* s390-opc.c: New improved opcode format macros and remove the
pregenerated opcode table.
* s390-opc.txt: Adapt to new improved opcode format macros.
2001-09-14 12:52:26 +02:00
2001-09-14 David Schleef <ds@schleef.org>
* ppc-opc.c (VXA, VXA_MASK): Fix mask bits.
2001-09-04 Alan Modra <amodra@bigpond.net.au>
* i386-dis.c (grps): Don't print the implicit al/ax/eax register
for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2001-08-31 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* mips-dis.c: Add support for bfd_mach_mipsisa32 and
bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
bfd_mach_mips64.
2001-08-31 Andreas Jaeger <aj@suse.de>
* tic54x-opc.c: Add default initializers to avoid warnings.
* arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
* arc-ext.c: Likewise.
2002-04-07 15:56:38 +02:00
2001-08-28 matthew green <mrg@redhat.com>
2001-08-28 07:47:29 +02:00
* ppc-opc.c (icbt): Order correctly.
2001-08-27 David Edelsohn <dje@watson.ibm.com>
Torbjorn Granlund <tege@swox.com>
* ppc-opc.c (DS): Add PPC_OPERAND_DS flag.
(LS): Define.
(insert_ds): Complain if not a multiple of 4.
(XSYNC): Define.
(XSYNC_MASK): Define.
(powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
"slbmfee". Modify "sync" to use XSYNC_MASK and LS.
2001-08-26 Andreas Jaeger <aj@suse.de>
* h8500-opc.h: Add default initializers to h8500_table to shut up
GCC warnings.
2001-08-25 Andreas Jaeger <aj@suse.de>
* tic54x-dis.c: Add unused attributes where needed.
* z8k-dis.c (output_instr): Add unused attribute.
* h8300-dis.c: Add missing prototypes.
(bfd_h8_disassemble): Make static.
* cris-dis.c: Add missing prototype.
* h8500-dis.c: Likewise.
* m68hc11-dis.c: Likewise.
* pj-dis.c: Likewise.
* tic54x-dis.c: Likewise.
* v850-dis.c: Likewise.
* vax-dis.c: Likewise.
* w65-dis.c: Likewise.
* z8k-dis.c: Likewise.
* d10v-dis.c: Add missing prototype.
(dis_long): Remove unused variable.
(dis_2_short): Likewise.
* sh-dis.c: Add missing prototypes.
* v850-opc.c: Likewise.
Add unused attributes where needed.
* ns32k-dis.c: Add missing prototypes.
(bit_extract_simple): Remove unused variable.
2001-08-23 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-opc.c: Add "low or high" and "not low or high"
branch instructions for gcc 3.0.
* s390-opc.txt: Likewise.
2001-08-21 Andreas Jaeger <aj@suse.de>
* i960-dis.c: Add parameters for prototypes
(ctrl): Add unused attributes.
(cobr): Likewise.
(put_abs): Likewise.
* mips-dis.c: Add missing prototypes.
* a29k-dis.c: Likewise.
* arc-dis.c: Likewise.
* ia64-opc.c: Likewise.
* s390-dis.c: Add missing prototypes.
(init_disasm): Remove unused attribute since the parameter is
used.
2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-opc.c (M1): Define. Reformatted Code.
(mips_builtin_opcodes): Added performance counter opcodes mfpc, mfps,
mtps, mtps. Typo.
2001-08-16 Jonathan Larmour <jlarmour@redhat.com>
* mips-opc.c: R3900s can support all branch likely INSN_MACROs where
the corresponding non-likely insn is in MIPS I.
2001-08-13 Kazu Hirata <kazu@hxi.com>
* mcore-dis.c: Fix formatting.
* mips-dis.c: Likewise.
* pj-dis.c: Likewise.
* z8k-dis.c: Likewise.
2001-08-12 Richard Henderson <rth@redhat.com>
* cgen-ibld.in (extract_normal): Match type of VALUE and MASK
to *VALUEP. Regenerate all cgen files.
2001-08-10 Richard Sandiford <rsandifo@redhat.com>
* mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32
argument.
* mips-opc.c (G6): Undefine.
(mips_builtin_opcodes): Remove gp32 entry for "move". Add macro
as the first "move" alternative.
2001-08-10 Andreas Jaeger <aj@suse.de>
* configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
to build warnings.
* configure: Regenerate.
2001-08-10 03:34:47 +02:00
2001-08-10 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Revert 2001-08-08.
2001-08-09 Alan Modra <amodra@bigpond.net.au>
* dis-buf.c (generic_strcat_address): Add missing prototype.
#if 0 the functions as it is unused.
2001-08-08 Alan Modra <amodra@bigpond.net.au>
1999-10-25 Torbjorn Granlund <tege@swox.com>
* ppc-opc.c: Include "bfd.h".
(powerpc_operands): Add new field for reloc type.
2001-07-21 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (print_insn_arg): Don't use software integer registers
for coprocessor registers.
(get_mips_isa): Removed.
(is_newabi): New function, checks if NewABI is used.
(_print_insn_mips): Get distinction between old ABI and new ABI right.
2001-08-01 17:39:17 +02:00
2001-08-01 Christian Groessler <cpg@aladdin.de>
* z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to
get stderr definition.
(internal, gas): Removed warnings.
(gas): Create a correct final entry for created array.
* z8k-opc.h: Recreated with new z8kgen.
2001-07-29 07:00:14 +02:00
2001-07-28 Kazu Hirata <kazu@hxi.com>
* i386-dis.c: Fix formatting.
2001-07-28 Matthias Kramm <kramm@quiss.org>
* i386-dis.c: Change formatting conventions for architecture
i386:intel to better match the format of various intel i386
assemblers, like nasm, tasm or masm.
2001-07-24 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Update dependencies with "make dep-am".
* Makefile.in: Regenerate
2001-07-24 Kazu Hirata <kazu@hxi.com>
* alpha-dis.c: Fix formatting.
* cris-dis.c: Likewise.
* d10v-dis.c: Likewise.
* d30v-dis.c: Likewise.
* m10300-dis.c: Likewise.
* tic54x-dis.c: Likewise.
2001-07-23 15:41:14 +02:00
2001-07-23 Kazu Hirata <kazu@hxi.com>
* m68k-dis.c: Fix formatting.
* pj-dis.c: Likewise.
* s390-dis.c: Likewise.
* z8k-dis.c: Likewise.
2001-07-23 15:41:14 +02:00
2001-07-21 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
into the rest of the surrounding definitions.
2001-07-18 Alan Modra <amodra@bigpond.net.au>
* i386-dis.c (grps): Print l or w suffix, and require mem modrm
for lgdt, lidt, sgdt, sidt.
2001-07-13 Philip Blundell <philb@gnu.org>
* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in: Include "xregex.h" always to enable the libiberty
regex support.
(@arch@_cgen_build_insn_regex): New routine from Graydon.
(@arch@_cgen_assemble_insn): Add Graydon's code to use regex
to verify if it is worth parsing the insn as insn "x". Also update
error message when insn is not a recognized format of the insn vs
when the insn is completely unrecognized.
2001-07-11 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
bfd_get_bits.
* cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
non-zero CGEN_CPU_DESC->insn_chunk_bitsize.
2001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de>
* i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
(OP_J): Use bfd_vma for mask to work properly with 64 bits.
(op_address,op_riprel): Use bfd_vma to handle 64 bits.
2001-07-05 Ben Elliston <bje@redhat.com>
* Makefile.am (CPUDIR): Define.
(stamp-m32r): Update dependencies.
(stamp-fr30): Ditto.
(stamp-openrisc): Ditto.
* Makefile.in: Regenerate.
2001-07-03 20:37:39 +02:00
2001-07-03 Zoltan Hidvegi <hzoli@hzoli.2y.net>
* ppc-opc.c: Fix encoding of 'clf' instruction.
2001-06-30 Geoffrey Keating <geoffk@redhat.com>
* cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.
2001-06-28 Geoffrey Keating <geoffk@redhat.com>
* cgen-asm.c (cgen_parse_keyword): Allow any first character.
* cgen-opc.c (cgen_keyword_add): Ignore special first
character when building nonalpha_chars field.
2001-06-24 Ben Elliston <bje@redhat.com>
* m88k-dis.c: Format to conform to GNU coding standards.
2001-06-23 Andreas Jaeger <aj@suse.de>
* disassemble.c (disassembler_usage): Add unused attribute.
2001-06-22 Eric Christopher <echristo@redhat.com>
* mips-opc.c: Move prefx to start of the table.
2001-06-22 Stacey Sheldon <ssheldon@Catena.com>
* arc-opc.c (insert_st_syntax): Fix over-optimisation of ST
instruction.
2001-06-22 10:21:14 +02:00
2001-06-22 Pauli <pauli@moreton.com.au>
* m68k-opc.c: Add wdebug instruction.
2001-06-15 Aldy Hernandez <aldyh@redhat.com>
* m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
2001-06-14 Geoffrey Keating <geoffk@redhat.com>
* cgen-asm.c (cgen_parse_keyword): When looking for the
boundaries of a keyword, allow any special characters
that are actually in one of the allowed keyword.
* cgen-opc.c (cgen_keyword_add): Add any special characters
to the nonalpha_chars field.
2001-06-12 13:50:53 +02:00
2001-06-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-opc.c: Add lgh instruction.
* s390-opc.txt: Likewise.
2001-06-11 Alan Modra <amodra@bigpond.net.au>
* i386-dis.c: Group function prototypes in one place.
(FLOATCODE): Redefine as 1.
(USE_GROUPS): Redefine as 2.
(USE_PREFIX_USER_TABLE): Redefine as 3.
(X86_64_SPECIAL): Define as 4.
(GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2.
(PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE.
(dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete.
(dis386): New table combining above four tables.
(dis386_twobyte_att, dis386_twobyte_intel): Delete.
(dis386_twobyte): New table combining above two tables.
(x86_64_table): New table to handle x86_64.
(X86_64_0): Define.
(float_mem_att, float_mem_intel): Delet.
(float_mem): New table combining above two tables.
(print_insn_i386): Modify for above.
(dofloat): Likewise.
(putop): Handle '{', '|' and '}' to select alternative mnemonics.
Return 0 on success, 1 if no valid alternative.
(putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax.
(putop <case 'T'>): Move to case 'U', and share case 'Q' code.
(putop <case 'I'>): Move to case 'T', and share case 'P' code.
(OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
if not 64-bit mode.
(OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode.
(OP_I64): If not 64-bit mode, call OP_I.
OP_OFF64): If not 64-bit mode, call OP_OFF.
(OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename
'ignore'/'ignored' to 'bytemode'.
2001-06-10 Alan Modra <amodra@bigpond.net.au>
* configure.in: Sort 'ta' case statement.
* configure: Regenerate.
* i386-dis.c (dis386_att): Add 'H' to conditional branch and
loop,jcxz insns.
(disx86_64_att): Likewise.
(dis386_twobyte_att): Likewise.
(print_insn_i386): Don't print branch hints as a prefix.
(putop): 'H' macro prints branch hints.
(get64): Kill compile warnings.
2001-06-09 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h (sh_table): Don't use empty initializers.
2001-06-06 Christian Groessler <cpg@aladdin.de>
* z8k-dis.c: Fix formatting.
(unpack_instr): Remove unused cases in switch statement. Add
safety abort() in default case.
(unparse_instr): Add safety abort() in default case.
2001-06-06 16:28:00 +02:00
2001-06-06 Peter Jakubek <pjak@snafu.de>
* m68k-dis.c (print_insn_m68k): Fix typo.
* m68k-opc.c (m68k_opcodes): Correct allowed operands for
2001-06-06 16:28:00 +02:00
mcf (ColdFire) div, rem and moveb instructions.
2001-06-06 Alan Modra <amodra@bigpond.net.au>
* i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
(cond_jump_mode, loop_jcxz_mode): Define.
(dis386_att): Add cond_jump_flag and loop_jcxz_flag as
appropriate, and 'F' suffix to loop insns.
(disx86_64_att): Likewise.
(dis386_twobyte_att): Likewise.
(print_insn_i386): Don't output addr prefix for loop, jcxz insns.
Output data size prefix for long conditional jumps. Output cs and
ds branch hints.
(putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
(OP_J): Don't make PREFIX_DATA used.
2001-06-04 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h (sh_table): Complete last element entry to avoid
compiler warning.
2001-05-23 19:26:40 +02:00
2001-05-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (mips_isa_type): Add MIPS r12k support.
2001-05-23 05:12:14 +02:00
2001-05-23 Alan Modra <amodra@one.net.au>
* arc-opc.c: Whitespace changes.
2001-05-18 Hans-Peter Nilsson <hp@axis.com>
* cris-opc.c (cris_spec_regs): Add missing initializer field for
last element.
2001-05-15 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (extract_normal): Complete support for min<base case.
2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-dis.c (INSNLEN): Rename MAXLEN.
(std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
(print_insn_arg): Remove $ prefix of register names.
(set_mips_isa_type): Remove.
2001-05-23 05:12:14 +02:00
(mips_isa_type): New function.
(get_mips_isa): New Function.
(print_insn_mips): Rename _print_insn_mips.
(_print_insn_mips): New function, contains code which was
duplicated in print_insn_big_mips and print_insn_little_mips.
(print_insn_big_mips): Moved code to _print_insn_mips.
(print_insn_little_mips): Likewise.
(print_mips16_insn_arg): Remove $ prefix of register names.
Print error message before abort.
2001-05-14 J.T. Conklin <jtc@redback.com>
* ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
simplified mnemonics used for setting PPC750-specific special
purpose registers.
2001-05-12 H.J. Lu <hjl@gnu.org>
* i386-dis.c (print_insn_i386): Always set `mod', `reg' and
`rm'.
2001-05-12 Peter Targett <peter.targett@arccores.com>
* arc-opc.c (arc_reg_names): Correct attribute for lp_count
register to r/w. Formatting fixes throughout file.
2001-05-12 Alan Modra <amodra@one.net.au>
* i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
movq operands.
(twobyte_has_modrm): Update table.
(need_modrm): Give it file scope.
(MODRM_CHECK): Define.
(dofloat): Use MODRM_CHECK.
(OP_E): Likewise.
(OP_EM): Likewise.
(OP_EX): Likewise.
2001-05-07 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (default_print_insn): Tolerate min<base instructions
even at end of a section.
* cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
by ignoring precariously-unpacked insn_value in favor of raw buffer.
2001-05-03 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* disassemble.c (disassembler_usage): Remove unused attribute.
2001-05-04 Frank Ch. Eigler <fche@redhat.com>
* m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
2001-05-04 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (print_insn): Remove call to read_insn. Instead,
assume incoming buffer already has the base insn loaded. Handle
2001-05-04 19:46:00 +02:00
smaller-than-base instructions for variable-length case.
2001-05-04 Alan Modra <amodra@one.net.au>
* i386-dis.c (Ev, Ed): Remove duplicate define.
(Gd): Define.
(XS): Define.
(OP_XS): New function.
(dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
movmskp operands.
(dis386_twobyte_intel): Likewise.
(prefix_user_table): Use MS for maskmovq operand.
2001-04-27 15:34:20 +02:00
2001-04-27 Johan Rydberg <jrydberg@opencores.org>
* Makefile.am: Add OpenRISC target.
* Makefile.in: Regenerated.
2001-04-27 15:34:20 +02:00
* disassemble.c (disassembler): Recognize the OpenRISC disassembly.
2001-04-27 15:34:20 +02:00
* configure.in (bfd_openrisc_arch): Add target.
* configure: Regenerated.
2001-04-27 15:34:20 +02:00
* openrisc-asm.c: New file.
* openrisc-desc.c: Likewise.
* openrisc-desc.h: Likewise.
* openrisc-dis.c: Likewise.
* openrisc-ibld.c: Likewise.
* openrisc-opc.c: Likewise.
* openrisc-opc.h: Likewise.
2001-04-27 15:34:20 +02:00
2001-04-24 17:22:25 +02:00
2001-04-24 Christian Groessler <cpg@aladdin.de>
* z8k-dis.c: add names of control registers (ctrl_names);
(seg_length): provides instruction length fixup for segmented
mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
(unparse_intr): handle CLASS_PR, print addresses without '#'
* z8k-opc.h: re-created with new z8kgen
* z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
entries for ldctl/ldctlb instruction
2001-04-06 11:27:33 +02:00
2001-04-06 Andreas Jaeger <aj@suse.de>
* i386-dis.c: Add ffreep instruction.
2001-03-30 Alexandre Oliva <aoliva@redhat.com>
* ppc-opc.c (insert_mbe): Shift mask initializer as long.
2001-03-24 07:29:16 +01:00
2001-03-24 Alan Modra <alan@linuxcare.com.au>
* i386-dis.c (PREGRP25): Define.
(dis386_twobyte_att): Use here in place of "movntq" entry.
(dis386_twobyte_intel): Likewise.
(prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
(PREGRP26): Define.
(dis386_twobyte_att): Use here.
(dis386_twobyte_intel): Likewise.
(prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
(prefix_user_table <maskmovdqu>): XM operand, not MX.
(prefix_user_table): Cosmetic changes to "bad" entries.
2001-03-24 01:40:22 +01:00
2001-03-23 Nick Clifton <nickc@redhat.com>
* mips-opc.c: Remove extraneous whitespace.
* mips-dis.c: Remove extraneous whitespace.
2001-03-22 Ben Elliston <bje@redhat.com>
* cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
* cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
to allay a compiler warning.
2001-03-22 03:27:54 +01:00
2001-03-22 Alan Modra <alan@linuxcare.com.au>
* i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
(dis386_twobyte_intel): Likewise.
(twobyte_has_modrm): Set entry for paddq, psubq.
2001-03-20 Patrick Macdonald <patrickm@redhat.com>
* cgen-dis.in (print_insn_@arch@): Add support for target machine
determination via CGEN_COMPUTE_MACH.
* fr30-desc.c: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-opc.h: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
2001-03-20 H.J. Lu <hjl@gnu.org>
* configure.in: Remove the redundent AC_ARG_PROGRAM.
* configure: Rebuild.
2001-03-19 Jim Wilson <wilson@redhat.com>
* ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
notestr if larger than xsect.
(in_class): Handle format M5.
* ia64-asmtab.c: Regnerate.
2001-03-19 John David Anglin <dave@hiauly1.hia.nrc.ca>
* vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
has more than one byte left to read.
2001-03-16 19:42:26 +01:00
2001-03-16 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-opc.c: Add new opcodes. Smooth out formatting.
* s390-opc.txt: Add new opcodes.
2001-04-06 11:27:33 +02:00
2001-03-06 23:33:47 +01:00
2001-03-06 Nick Clifton <nickc@redhat.com>
* arm-dis.c (print_insn_thumb): Compute destination address
of BLX(1) instruction by taking bit 1 from PC and not from bit
0 of the offset.
2001-03-06 23:33:47 +01:00
2001-03-06 21:13:31 +01:00
2001-03-06 Igor Shevlyakov <igor@windriver.com>
* m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
so command line switches will work.
2001-03-05 Dave Brolley <brolley@redhat.com>
2001-03-05 17:01:29 +01:00
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-desc.h: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-ibld.c: Regenerate.
* fr30-opc.c: Regenerate.
* fr30-opc.h: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-desc.h: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-ibld.c: Regenerate.
* m32r-opc.c: Regenerate.
* m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
2001-03-01 00:47:10 +01:00
2001-02-28 Igor Shevlyakov <igor@windriver.com>
* m68k-opc.c: fix cpushl according to Motorola. Enable
bunch of instructions for Coldfire 5407 and add all new.
2001-02-27 Alan Modra <alan@linuxcare.com.au>
* configure.in (BFD_VERSION): Do without grep.
* configure: Regenerate.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2001-02-23 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
* ia64-asmtab.c: Regenerate.
2001-02-21 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
separate variants: one for IMM22 and the other for IMM14.
* ia64-asmtab.c: Regenerate.
2001-04-06 11:27:33 +02:00
2001-02-21 Greg McGary <greg@mcgary.org>
* cgen-opc.c (cgen_get_insn_value): Add missing `return'.
2001-02-20 H.J. Lu <hjl@gnu.org>
* Makefile.am (ia64-ic.tbl): Remove the target.
(ia64-raw.tbl): Likewise.
(ia64-waw.tbl): Likewise.
(ia64-war.tbl): Likewise.
(ia64-asmtab.c): Generate it in the source directory.
* Makefile.in: Regenerated.
2001-02-19 00:33:11 +01:00
2001-02-18 lars brinkhoff <lars@nocrew.org>
* Makefile.am: Add PDP-11 target.
* configure.in: Likewise.
* disassemble.c: Likewise.
* pdp11-dis.c: New file.
* pdp11-opc.c: New file.
2001-02-19 00:33:11 +01:00
2001-02-14 Jim Wilson <wilson@redhat.com>
* ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
* ia64-asmtab.c: Regenerate.
2002-07-25 12:31:28 +02:00
2001-02-12 Jan Hubicka <jh@suse.cz>
* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
instructions.
(putop): Handle 'Y'
2001-02-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* mips-dis.c (print_insn_arg): Use top four bits of the address of
the following instruction not of the jump itself for the jump
target.
(print_mips16_insn_arg): Likewise.
2001-02-11 Michael Sokolov <msokolov@ivan.Harhan.ORG>
* Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
directory.
* Makefile.in: Regenerate.
2001-02-10 01:58:38 +01:00
2001-02-09 Schwidefsky <schwidefsky@de.ibm.com>
* Makefile.am: Add linux target for S/390.
* Makefile.in: Likewise.
* configure.in: Likewise.
* disassemble.c: Likewise.
* s390-dis.c: New file.
* s390-mkopc.c: New file.
* s390-opc.c: New file.
* s390-opc.txt: New file.
2001-02-05 Jim Wilson <wilson@redhat.com>
* ia64-asmtab.c: Revert 2000-12-16 change.
2001-02-02 Patrick Macdonald <patrickm@redhat.com>
2001-04-06 11:27:33 +02:00
* fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
* m32r-desc.h: Regenerate.
2002-07-25 12:31:28 +02:00
2001-02-01 Jan Hubicka <jh@suse.cz>
* i386-dis.c (dis386_att, grps): Use 'T' for push/pop
(putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2001-01-14 Alan Modra <alan@linuxcare.com.au>
* hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
2001-01-13 20:45:52 +01:00
2001-01-13 Nick Clifton <nickc@redhat.com>
* disassemble.c: Remove spurious white space.
2002-07-25 12:31:28 +02:00
2001-01-13 Jan Hubicka <jh@suse.cz>
* i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
templates.
2001-01-11 Peter Targett <peter.targett@arccores.com>
* configure.in: Add arc-ext.lo for bfd_arc_arch selection.
* Makefile.am (C_FILES): Add arc-ext.c.
(ALL_MACHINES) Add arc-ext.lo.
(INCLUDES) Add opcode directory to list.
New dependency entry for arc-ext.lo.
* disassemble.c (disassembler): Correct call to
arc_get_disassembler.
* arc-opc.c: New update for ARC, including full base
instructions for ARC variants.
* arc-dis.h, arc-dis.c: New update for ARC, including
extensibility functionality.
* arc-ext.h, arc-ext.c: New files for handling extensibility.
2001-01-10 Jan Hubicka <jh@suse.cz>
* i386-dis.c (PREGRP15 - PREGRP24): New.
(dis386_twobyt): Add SSE2 instructions.
(twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
(twobyte_uses_f3_prefix): ... this one.
(grps): Add SSE instructions.
(prefix_user_table): Add two new slots; add SSE2 instructions.
(print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
Handle the REPNZ and Data16 prefixes as well; do proper lookup
to prefix_user_table.
(OP_E): Accept mfence and lfence as well.
(OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
(OP_XMM): Support REX extensions.
(OP_EM): Likewise.
(OP_EX): Likewise.
2001-01-09 Nick Clifton <nickc@redhat.com>
* arm-dis.c (print_insn): Set pc to zero for instructions with
a reloc associated with them.
2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in (parse_insn_normal): Changed syn to be
CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
as character to use CGEN_SYNTAX_CHAR macro and all comparisons
to '\0' to use 0 instead.
* cgen-dis.in (print_insn_normal): Ditto.
* cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
2001-01-05 Jan Hubicka <jh@suse.cz>
* i386-dis.c: Add x86_64 support.
(rex): New static variable.
(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
(USED_REX): New macro.
(Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
(OP_I64, OP_OFF64, OP_IMREG): New functions.
(OP_REG, OP_OFF): Declare.
(get64, get32, get32s): New functions.
(r??_reg): New constants.
(dis386_att): Change templates of instruction implicitly promoted
to 64bit; change e?? to RMe?? for unwind RM byte instructions.
(grps): Likewise.
(dis386_intel): Likewise.
(dixx86_64_att): New table based on dis386_att.
(dixx86_64_intel): New table based on dis386_intel.
(names64, names8rex): New global variable.
(names32, names16): Add extended registers.
(prefix_user_t): Recognize rex prefixes.
(prefix_name): Print REX prefixes nicely.
(op_riprel): New global variable.
(start_pc): Set type to bfd_vma.
(print_insn_i386): Detect the 64bit mode and use proper table;
move ckprefix after initializing the buffer; output unused rex prefixes;
output information about target of RIP relative addresses.
(putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
(print_operand_value): New function.
(OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
REX prefix and new modes.
(get64, get32s): New.
(get32): Return bfd_signed_vma type.
(set_op): Initialize the op_riprel.
* disassemble.c (disassembler): Recognize the x86-64 disassembly.
2001-01-03 Richard Sandiford <r.sandiford@redhat.com>
cgen-dis.in (read_insn): Use bfd_get_bits()
2001-01-02 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.c (hash_insn_array): Use bfd_put_bits().
(hash_insn_list): Likewise
* cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
(extract_1): Use bfd_get_bits().
(extract_normal): Apply sign extension to both extraction
methods.
* cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
(cgen_put_insn_value): Use bfd_put_bits()
2000-12-28 Frank Ch. Eigler <fche@redhat.com>
* cgen-asm.in (parse_insn_normal): Print better error message for
instructions with missing operands.
2000-12-21 19:43:33 +01:00
2000-12-21 Santeri Paavolainen <santtu@ssh.com>
* cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
2000-12-16 23:01:44 +01:00
2000-12-16 Nick Clifton <nickc@redhat.com>
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* config.in: Regenerate.
* configure.in: Add spacing.
* configure: Regenerate.
* ia64-asmtab.c: Regenerate.
* po/opcodes.pot: Regenerate.
2000-12-12 Frank Ch. Eigler <fche@redhat.com>
* cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
error messages over later parse-time ones.
2000-12-12 Jim Wilson <wilson@redhat.com>
* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
argument.
* ia64-gen.c (insert_deplist): Cast sizeof result to int.
(print_dependency_table): Print NULL if semantics field not set.
(insert_opcode_dependencies): Mark cmp parameter as unused.
(print_main_table): Use fprintf_vma to print long long fields.
(main): Mark argv paramter as unused. Convert to old style definition.
* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
* ia64-asmtab.c: Regnerate.
2000-12-09 23:22:33 +01:00
2000-12-09 Nick Clifton <nickc@redhat.com>
* m32r-dis.c (print_insn): Prevent re-read of instruction from
wrong address.
2000-12-09 23:22:33 +01:00
* fr30-dis.c: Regenerate.
2000-12-08 Peter Targett <peter.targett@arccores.com>
* configure.in: Add arc-ext.lo for bfd_arc_arch selection.
* Makefile.am (C_FILES): Add arc-ext.c.
(ALL_MACHINES) Add arc-ext.lo.
(INCLUDES) Add opcode directory to list.
New dependency entry for arc-ext.lo.
* disassemble.c (disassembler): Correct call to
arc_get_disassembler.
* arc-opc.c: New update for ARC, including full base
instructions for ARC variants.
* arc-dis.h, arc-dis.c: New update for ARC, including
extensibility functionality.
* arc-ext.h, arc-ext.c: New files for handling extensibility.
2000-12-03 Chris Demetriou cgd@sibyte.com
* mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
MOD_HILO, and MOD_LO macros.
* mips-opc.c (M1, M2): Delete.
(mips_builtin_opcodes): Remove all uses of M1.
2000-12-03 22:58:27 +01:00
* mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
instructions take "G" format second operands and use the
correct flags.
There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
2000-12-03 23:10:02 +01:00
match.
Delete "sel" code operands from mfc1 and mtc1.
Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
2000-12-03 23:10:02 +01:00
for dm[ft]c[023].
2001-04-06 11:27:33 +02:00
2000-12-03 22:34:08 +01:00
2000-12-03 Ed Satterthwaite ehs@sibyte.com and
Chris Demetriou cgd@sibyte.com
2000-12-03 22:34:08 +01:00
* mips-opc.c (mips_builtin_opcodes): Finish additions
for MIPS32 support, and clean up existing entries for
aesthetics, consistency with the MIPS32 ISA, and
with consistency the rest of the table.
2000-12-03 22:34:08 +01:00
2000-12-01 21:06:36 +01:00
2000-12-01 Nick Clifton <nickc@redhat.com>
* mips16-opc.c (mips16_opcodes): Add initialiser for membership
field.
2000-12-01 21:05:32 +01:00
2000-12-01 Chris Demetriou <cgd@sibyte.com>
mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
specifiers. Update 'B' for new constant names, and remove
'm'.
mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
near the top of the array, so they are disassembled properly.
Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
code for MIPS32. Update "clo" and "clz" to use 'U' operand
specifier. Add 'H' format specifier variants for "mfc1,"
"mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
"wait" variant which uses 'J' operand specifier.
* mips-dis.c (set_mips_isa_type): Update to use
CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
* mips-opc.c (I32): New constant for instructions added in
MIPS32.
(P4): Delete.
(mips_builtin_opcodes) Replace all uses of P4 with I32.
* mips-dis.c (set_mips_isa_type): Add cases for
bfd_mach_mips5 and bfd_mach_mips64.
* mips-opc.c (I64): New definitions.
* mips-dis.c (set_mips_isa_type): Add case for
bfd_mach_mips_sb1.
2000-12-02 02:10:33 +01:00
2000-11-28 Hans-Peter Nilsson <hp@bitrange.com>
* sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
(print_insn_ppi): Make nib1, nib2, nib3 unsigned.
Initialize variable dc to NULL.
(print_insn_shx): Remove unused label d_reg_n.
2000-11-25 01:21:40 +01:00
2000-11-24 Nick Clifton <nickc@redhat.com>
* arm-opc.h: Add new opcode formatting parameter 'B'.
(arm_opcodes): Add XScale, v5, and v5te instructions.
(thumb_opcodes): Add v5t instructions.
* arm-dis.c (print_insn_arm): Handle new 'B' format
parameter.
(print_insn_thumb): Decode BLX(1) instruction.
2000-11-22 19:01:56 +01:00
2000-11-21 Chris Demetriou <cgd@sibyte.com>
* mips-opc.c: Fix file header comment.
2000-11-14 Hans-Peter Nilsson <hp@axis.com>
* cris-dis.c (cris_get_disassembler): If abfd is NULL, return
print_insn_cris_with_register_prefix.
2000-11-11 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
2000-11-07 Matthew Green <mrg@redhat.com>
* cgen-dis.in (print_insn): All insns which can fit into insn_value
must be loaded there in their entirety.
2000-10-20 Jakub Jelinek <jakub@redhat.com>
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
2000-10-16 20:18:47 +02:00
2000-10-16 Nick Clifton <nickc@redhat.com>
* mcore-dis.c (imsk): Change mask for OC to 0xFE00.
2000-10-06 Dave Brolley <brolley@redhat.com>
* fr30-desc.h: Regenerate.
* m32r-desc.h: Regenerate.
* m32r-ibld.c: Regenerate.
2000-10-05 Jim Wilson <wilson@redhat.com>
* ia64-ic.tbl: Update from Intel.
* ia64-asmtab.c: Regenerate.
2001-04-06 11:27:33 +02:00
2000-10-04 Kazu Hirata <kazu@hxi.com>
* ia64-gen.c: Convert C++-style comments to C-style comments.
* tic54x-dis.c: Likewise.
2000-09-29 20:23:26 +02:00
2000-09-29 Hans-Peter Nilsson <hp@axis.com>
Changes to add dollar prefix to registers for files where user symbols
don't have a leading underscore. Fix formatting.
* cris-dis.c (REGISTER_PREFIX_CHAR): New.
(format_reg): Add parameter with_reg_prefix. All callers changed.
(print_with_operands): Ditto.
(print_insn_cris_generic): Renamed from print_insn_cris, add
parameter with_reg_prefix.
(print_insn_cris_with_register_prefix,
print_insn_cris_without_register_prefix, cris_get_disassembler):
New.
* disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
2000-09-22 Jim Wilson <wilson@redhat.com>
* ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
gt, ge, ngt, and nge.
* ia64-asmtab.c: Regenerate.
* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
* ia64-asmtab.c: Regnerate.
2000-09-14 03:47:38 +02:00
2000-09-13 Anders Norlander <anorland@acc.umu.se>
2001-04-06 11:27:33 +02:00
* mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
Add mfc0 and mtc0 with sub-selection values.
2000-09-14 03:47:38 +02:00
Add clo and clz opcodes.
2001-04-06 11:27:33 +02:00
Add msub and msubu instructions for MIPS32.
Add madd/maddu aliases for mad/madu for MIPS32.
Support wait, deret, eret, movn, pref for MIPS32.
2000-09-14 03:47:38 +02:00
Support tlbp, tlbr, tlbwi, tlbwr.
2001-04-06 11:27:33 +02:00
(P4): New define.
* mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
(print_insn_arg): Handle 'H' args.
(set_mips_isa_type): Recognize 4K.
2000-09-14 03:47:38 +02:00
Use CPU_* defines instead of hardcoded numbers.
2000-09-11 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_operand_t): New operand type Rb2.
(d30v_format_tab): Use Rb2 for modinc and moddec.
2001-04-06 11:27:33 +02:00
2000-09-07 Catherine Moore <clm@redhat.com>
2001-04-06 11:27:33 +02:00
* d30v-opc.c (d30v_format_tab): Use format Ra for
modinc and moddec.
2000-09-06 Alexandre Oliva <aoliva@redhat.com>
* configure: Rebuilt with new libtool.m4.
2000-09-05 Nick Clifton <nickc@redhat.com>
* configure: Regenerate.
* po/opcodes.pot: Regenerate.
2001-04-06 11:27:33 +02:00
2000-08-31 Alexandre Oliva <aoliva@redhat.com>
* acinclude.m4: Include libtool and gettext macros from the
top level.
* aclocal.m4, configure: Rebuilt.
2000-08-30 Kazu Hirata <kazu@hxi.com>
* tic80-dis.c: Fix formatting.
2000-08-29 Kazu Hirata <kazu@hxi.com>
* w65-dis.c: Fix formatting.
2000-09-04 01:36:46 +02:00
2000-08-28 Mark Hatle <mhatle@mvista.com>
* ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
(powerpc_opcodes): Add table entries for PPC 405 instructions.
Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
instructions. Added extended mnemonic mftbl as defined in the
405GP manual for all PPCs.
2000-08-28 Jim Wilson <wilson@redhat.com>
* ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
call. Change last goto to use failed instead of done.
2000-08-28 Dave Brolley <brolley@redhat.com>
* cgen-ibld.in (cgen_put_insn_int_value): New function.
(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
* cgen-dis.in (read_insn): New static function.
(print_insn): Use read_insn to read the insn into the buffer and set
up for disassembly.
(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
in the buffer.
* fr30-asm.c: Regenerated.
* fr30-desc.c: Regenerated.
* fr30-desc.h: Regenerated.
* fr30-dis.c: Regenerated.
* fr30-ibld.c: Regenerated.
* fr30-opc.c: Regenerated.
* fr30-opc.h: Regenerated.
* m32r-asm.c: Regenerated.
* m32r-desc.c: Regenerated.
* m32r-desc.h: Regenerated.
* m32r-dis.c: Regenerated.
* m32r-ibld.c: Regenerated.
* m32r-opc.c: Regenerated.
2000-08-28 Kazu Hirata <kazu@hxi.com>
* tic30-dis.c: Fix formatting.
2000-08-27 Kazu Hirata <kazu@hxi.com>
* sh-dis.c: Fix formatting.
2000-08-24 David Edelsohn <dje@watson.ibm.com>
* ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
2000-08-24 Kazu Hirata <kazu@hxi.com>
* z8k-dis.c: Fix formatting.
2000-08-16 Jim Wilson <wilson@redhat.com>
* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
break, mov-immediate, nop.
* ia64-opc-f.c: Delete fpsub instructions.
* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
address operand. Rewrite using macros to avoid long lines.
* ia64-opc.h (POSTINC): Define.
* ia64-asmtab.c: Regenerate.
2000-08-15 Jim Wilson <wilson@redhat.com>
* ia64-ic.tbl: Add missing entries.
2000-08-08 Jason Eckhardt <jle@redhat.com>
* i860-dis.c (print_br_address): Change third argument from int
to long.
2000-08-07 Richard Henderson <rth@redhat.com>
* ia64-dis.c (print_insn_ia64): Get byte skip count correct
for MLI templates. Handle IA64_OPND_TGT64.
2000-09-04 01:36:46 +02:00
2000-08-04 Ben Elliston <bje@redhat.com>
* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
* cgen.sh: Likewise.
2000-08-02 Jim Wilson <wilson@redhat.com>
2001-04-06 11:27:33 +02:00
2000-09-04 01:36:46 +02:00
* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
* avr-dis.c (avr_operand): Use PARAMS macro in declaration.
Change return type from void to int. Check the combination
of operands, return 1 if valid. Fix to avoid BUF overflow.
Report undefined combinations of operands in COMMENT.
Report internal errors to stderr. Output the adiw/sbiw
constant operand in both decimal and hex.
(print_insn_avr): Disassemble ldd/std with displacement of 0
as ld/st. Check avr_operand () return value, handle invalid
combinations of operands like unknown opcodes.
2000-07-28 Ben Elliston <bje@redhat.com>
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
(run-cgen, stamp-m32r, stamp-fr30): New targets.
* Makefile.in: Regenerate.
* configure.in: Add --enable-cgen-maint option.
* configure: Regenerate.
2000-07-31 20:50:56 +02:00
2000-07-26 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
(cgen_hw_lookup_by_num): Ditto.
(cgen_operand_lookup_by_name): Ditto.
(print_address): Ditto.
(print_keyword): Ditto.
* cgen-dis.c (hash_insn_array): Mark unused parameters with
ATTRIBUTE_UNUSED.
* cgen-asm.c (hash_insn_array): Mark unused parameters with
ATTRIBUTE_UNUSED.
(cgen_parse_keyword): Ditto.
2000-07-22 Jason Eckhardt <jle@redhat.com>
* i860-dis.c: New file.
(print_insn_i860): New function.
(print_br_address): New function.
(sign_extend): New function.
(BITWISE_OP): New macro.
(I860_REG_PREFIX): New macro.
(grnames, frnames, crnames): New structures.
* disassemble.c (ARCH_i860): Define.
(disassembler): Add check for bfd_arch_i860 to set disassemble
function to print_insn_i860.
* Makefile.in (CFILES): Added i860-dis.c.
(ALL_MACHINES): Added i860-dis.lo.
(i860-dis.lo): New dependences.
* configure.in: New bits for bfd_i860_arch.
* configure: Regenerated.
2000-07-20 Hans-Peter Nilsson <hp@axis.com>
* Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
(cris-dis.lo, cris-opc.lo): New rules.
* Makefile.in: Rebuild.
* configure.in (bfd_cris_arch): New target.
* configure: Rebuild.
* disassemble.c (ARCH_cris): Define.
(disassembler): Support ARCH_cris.
* cris-dis.c, cris-opc.c: New files.
* po/POTFILES.in, po/opcodes.pot: Regenerate.
2000-07-11 Jakub Jelinek <jakub@redhat.com>
* sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
Reported by Bill Clarke <llib@computer.org>.
2000-07-09 Geoffrey Keating <geoffk@redhat.com>
* ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
2000-07-09 Alan Modra <alan@linuxcare.com.au>
* hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
fput_const, extract_3, extract_5_load, extract_5_store,
extract_5r_store, extract_5R_store, extract_10U_store,
extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
extract_12, extract_17, extract_22): Prototype.
(print_insn_hppa): Rename inner block opcode -> opc to avoid
shadowing outer block.
(GET_BIT): Define.
2000-07-10 20:07:44 +02:00
2000-07-05 DJ Delorie <dj@redhat.com>
2000-07-05 21:28:06 +02:00
* MAINTAINERS: new
2000-07-04 Alexandre Oliva <aoliva@redhat.com>
* arm-dis.c (print_insn_arm): Output combinations of PSR flags.
2000-07-03 Marek Michalkiewicz <marekm@linux.org.pl>
* avr-dis.c (avr_operand): Change _ () to _() around all strings
marked for translation (exception from the usual coding style).
(print_insn_avr): Initialize insn2 to avoid warnings.
2000-07-03 23:52:37 +02:00
2000-07-03 Kazu Hirata <kazu@hxi.com>
* h8300-dis.c (bfd_h8_disassemble): Improve readability.
* h8500-dis.c: Fix formatting.
2000-07-01 Alan Modra <alan@linuxcare.com.au>
* Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
(CLEANFILES): Add DEPA.
* Makefile.in: Regenerate.
2000-06-26 Scott Bambrough <scottb@netwinder.org>
* arm-dis.c (regnames): Add an additional register set to match
the set used by GCC. Make it the default.
2000-06-22 Alan Modra <alan@linuxcare.com.au>
* Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
find one.
* Makefile.in: Regenerate.
2000-06-20 H.J. Lu <hjl@gnu.org>
* Makefile.am: Rebuild dependency.
* Makefile.in: Rebuild.
2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
* Makefile.in, configure: regenerate
2001-04-06 11:27:33 +02:00
* disassemble.c (disassembler): Recognize ARCH_m68hc12,
ARCH_m68hc11.
2001-04-06 11:27:33 +02:00
* m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
New functions.
* configure.in: Recognize m68hc12 and m68hc11.
* m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
2001-04-06 11:27:33 +02:00
* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
and opcode generation for m68hc11 and m68hc12.
2000-06-16 Nick Duffek <nsd@redhat.com>
* disassemble.c (disassembler): Refer to the PowerPC 620 using
bfd_mach_ppc_620 instead of 620.
2000-06-12 Kazu Hirata <kazu@hxi.com>
* h8300-dis.c: Fix formatting.
(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
correctly.
2000-06-09 Denis Chertykov <denisc@overta.ru>
* avr-dis.c (avr_operand): Bugfix for jmp/call address.
2000-06-07 Denis Chertykov <denisc@overta.ru>
2000-06-07 19:45:44 +02:00
* avr-dis.c: completely rewritten.
2000-06-16 09:42:12 +02:00
2000-06-02 Kazu Hirata <kazu@hxi.com>
2000-06-02 20:09:28 +02:00
* h8300-dis.c: Follow the GNU coding style.
(bfd_h8_disassemble) Fix a typo.
2000-06-01 Kazu Hirata <kazu@hxi.com>
* h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
(bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
correctly. Fix a typo.
2000-05-31 Nick Clifton <nickc@redhat.com>
* opintl.h (_(String)): Explain why dgettext is used instead of
gettext.
2000-05-30 Nick Clifton <nickc@redhat.com>
* opintl.h (gettext, dgettext, dcgettext, textdomain,
bindtextdomain): Replace defines with those from intl/libgettext.h
to quieten gcc warnings.
2000-05-26 16:14:21 +02:00
2000-05-26 Alan Modra <alan@linuxcare.com.au>
* Makefile.am: Update dependencies with "make dep-am"
* Makefile.in: Regenerate.
2000-05-25 Alexandre Oliva <aoliva@redhat.com>
* m10300-dis.c (disassemble): Don't assume 32-bit longs when
sign-extending operands.
2000-05-15 Donald Lindsay <dlindsay@redhat.com>
* d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
except brf's.
2000-05-21 Nick Clifton <nickc@redhat.com>
2000-05-21 19:01:02 +02:00
* Makefile.am (LIBIBERTY): Define.
2000-05-19 Diego Novillo <dnovillo@redhat.com>
* mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
(reg_names): Rename to std_reg_names. Change it to a char **
static variable.
(std_reg_names): New name for reg_names.
(set_mips_isa_type): Set reg_names to point to std_reg_names by
default.
2000-05-16 Frank Ch. Eigler <fche@redhat.com>
* fr30-desc.h: Partially regenerated to account for changed
CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
* m32r-desc.h: Ditto.
2000-05-15 Nick Clifton <nickc@redhat.com>
* arm-opc.h: Use upper case for flasg in MSR and MRS
instructions. Allow any bit to be set in the field_mask of
the MSR instruction.
* arm-dis.c (print_insn_arm): Decode _x and _s bits of the
field_mask of an MSR instruction.
2000-05-11 Thomas de Lellis <tdel@windriver.com>
* arm-opc.h: Disassembly of thumb ldsb/ldsh
2000-06-16 09:42:12 +02:00
instructions changed to ldrsb/ldrsh.
2000-05-11 Ulf Carlsson <ulfc@engr.sgi.com>
* mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
target addresses for 'jal' and 'j'.
2000-05-10 Geoff Keating <geoffk@redhat.com>
* ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
also available in common mode when powerpc syntax is being used.
2000-05-08 Alan Modra <alan@linuxcare.com.au>
* m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
(dummy_print_address): Ditto.
2000-05-04 Timothy Wall <twall@redhat.com>
2000-05-06 19:14:34 +02:00
* tic54x-opc.c: New.
* tic54x-dis.c: New.
* disassemble.c (disassembler): Add ARCH_tic54x.
* configure.in: Added tic54x target.
* configure: Ditto.
* Makefile.am: Add tic54x dependencies.
2000-06-16 09:42:12 +02:00
* Makefile.in: Ditto.
2000-05-06 19:14:34 +02:00
2000-05-03 J.T. Conklin <jtc@redback.com>
* ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
2000-06-16 09:42:12 +02:00
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.
* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-04-24 Clinton Popetz <cpopetz@redhat.com>
2000-09-04 01:36:46 +02:00
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-24 Nick Clifton <nickc@redhat.com>
2000-09-04 01:36:46 +02:00
* fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
field.
2000-04-23 Denis Chertykov <denisc@overta.ru>
* avr-dis.c (reg_fmul_d): New. Extract destination register from
FMUL instruction.
(reg_fmul_r): New. Extract source register from FMUL instruction.
(reg_muls_d): New. Extract destination register from MULS instruction.
(reg_muls_r): New. Extract source register from MULS instruction.
(reg_movw_d): New. Extract destination register from MOVW instruction.
(reg_movw_r): New. Extract source register from MOVW instruction.
(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2000-04-22 Timothy Wall <twall@redhat.com>
2000-04-23 04:39:13 +02:00
* ia64-gen.c (general): Add an ordered table of primary
opcode names, as well as priority fields to disassembly data
structures to enforce a preferred disassembly format based on the
ordering of the opcode tables.
(load_insn_classes): Show a useful message if IC tables are missing.
(load_depfile): Ditto.
* ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
distinguish preferred disassembly.
* ia64-opc-f.c: Reorder some insn for preferred disassembly
format. Fix incorrect flag on fma.s/fma.s.s0.
* ia64-opc.c: Scan *all* disassembly matches and use the one with
the highest priority.
* ia64-opc-b.c: Use more abbreviations.
* ia64-asmtab.c: Regenerate.
2000-06-16 09:42:12 +02:00
2000-04-21 Jason Eckhardt <jle@redhat.com>
* hppa-dis.c (extract_16): New function.
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
new operand types l,y,&,fe,fE,fx.
2000-04-21 Richard Henderson <rth@redhat.com>
David Mosberger <davidm@hpl.hp.com>
Timothy Wall <twall@redhat.com>
Bob Manson <manson@charmed.cygnus.com>
Jim Wilson <wilson@redhat.com>
2000-04-21 22:22:24 +02:00
* Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
(CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
ia64-asmtab.c.
(ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
(ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
* Makefile.in: Rebuild.
* configure Rebuild.
* configure.in (bfd_ia64_arch): New target.
* disassemble.c (ARCH_ia64): Define.
(disassembler): Support ARCH_ia64.
* ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
ia64-war.tbl, ia64-waw.tbl: New files.
2000-06-16 09:42:12 +02:00
2000-04-20 Alexandre Oliva <aoliva@redhat.com>
* m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
(disassemble): Use them.
2000-04-14 Alan Modra <alan@linuxcare.com.au>
* sysdep.h: Include "ansidecl.h" not <ansidecl.h>
* Makefile.am: Update dependencies.
* Makefile.in: Regenerate.
2000-04-14 Michael Sokolov <msokolov@ivan.Harhan.ORG>
* a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
ansidecl.h as sysdep.h includes it.
2000-04-7 Andrew Cagney <cagney@b1.redhat.com>
2000-06-16 09:42:12 +02:00
* configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
2000-06-16 09:42:12 +02:00
--enable-build-warnings option.
* Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
* Makefile.in, configure: Re-generate.
2000-04-05 J"orn Rennecke <amylaar@redhat.com>
* sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
2000-04-05 J"orn Rennecke <amylaar@redhat.co.uk>
sh-dsp REPEAT support: opcodes: * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (sh_arg_type): Add A_PC. (sh_table): Update entries using immediates. Add repeat. * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. gas: * config/tc-sh.c (immediate): Delete. (sh_operand_info): Add immediate member. (parse_reg): Use A_PC for pc. (parse_exp): Add second argument 'op'. All callers changed. (parse_at): Expect pc to be coded as A_PC. Use immediate field in *op. (insert): Add fourth argument 'op'. All callers changed. (build_relax): Add second argument 'op'. All callers changed. (insert_loop_bounds): New function. (build_Mytes): Remove DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (assemble_ppi): Use immediate field in *operand. (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL. include/coff: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define. include/elf: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. bfd: * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and BFD_RELOC_SH_LOOP_END. * elf32-sh.c (sh_elf_howto_tab): Change special_func to sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore. Add entries for R_SH_LOOP_START and R_SH_LOOP_END. (sh_elf_reloc_loop): New function. (sh_elf_reloc): No need to test for always-to-be-ignored relocs any more. (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}. (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}. * bfd-in2.h, libbfd.h: Regenerate.
2000-04-05 23:23:05 +02:00
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
2000-04-04 Alan Modra <alan@linuxcare.com.au>
* po/opcodes.pot: Regenerate.
* Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
(DEP): Quote when passing vars to sub-make. Add warning message
to end.
(DEP1): Rewrite for "gcc -MM".
(CLEANFILES): Add DEP2.
Update dependencies.
* Makefile.in: Regenerate.
2000-04-03 Denis Chertykov <denisc@overta.ru>
* avr-dis.c: Syntax cleanup.
(add0fff): Print the pc relative address as a signed number.
(add03f8): Likewise.
2000-04-01 Ian Lance Taylor <ian@zembu.com>
* disassemble.c (disassembler_usage): Don't use a prototype. Mark
the parameter ATTRIBUTE_UNUSED.
* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-01 Alexandre Oliva <aoliva@redhat.com>
* m10300-opc.c: SP-based offsets are always unsigned.
2000-03-29 Thomas de Lellis <tdel@windriver.com>
* arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
[branch always] instead of "undefined".
2000-03-27 Nick Clifton <nickc@redhat.com>
* d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
short instructions, from end of list of long instructions.
2000-03-27 Ian Lance Taylor <ian@zembu.com>
* Makefile.am (CFILES): Add avr-dis.c.
(ALL_MACHINES): Add avr-dis.lo.
2000-03-27 10:39:14 +02:00
2000-03-27 Alan Modra <alan@linuxcare.com>
* avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
truncate integers.
(print_insn_avr): Call function via pointer in K&R compatible way.
(dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
add0fff, add03f8): Convert to old style function declaration and
add prototype.
(avrdis_opcode): Add prototype.
2000-03-27 Denis Chertykov <denisc@overta.ru>
* avr-dis.c: New file. AVR disassembler.
* configure.in (bfd_avr_arch): New architecture support.
* disassemble.c: Likewise.
* configure: Regenerate.
2000-03-06 J"oern Rennecke <amylaar@redhat.com>
* sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
2000-03-02 J"orn Rennecke <amylaar@redhat.co.uk>
2000-03-03 00:01:40 +01:00
2000-06-16 09:42:12 +02:00
* d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
flag to determine if operand is pc-relative.
* d30v-opc.c:
(d30v_format_table):
(REL6S3): Renamed from IMM6S3.
Added flag OPERAND_PCREL.
(REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
added flag OPERAND_PCREL.
(IMM12S3U): Replaced with REL12S3.
(SHORT_D2, LONG_D): Delay target is pc-relative.
(SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
using the REL* operands.
(LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
(SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
LONG_Db, using REL* operands.
(SHORT_U, SHORT_A5S): Removed stray alternatives.
(d30v_opcode_table): Use new *r formats.
2000-03-03 00:01:40 +01:00
2000-02-28 Nick Clifton <nickc@redhat.com>
* m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
'signed_overflow_ok_p'.
2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>
* Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
name of the libtool directory.
* Makefile.in: Rebuild.
2000-02-24 Nick Clifton <nickc@redhat.com>
* cgen-opc.c (cgen_set_signed_overflow_ok): New function.
(cgen_clear_signed_overflow_ok): New function.
(cgen_signed_overflow_ok_p): New function.
2000-02-23 Andrew Haley <aph@redhat.com>
2000-06-16 09:42:12 +02:00
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
m32r-ibld.c, m32r-opc.h: Rebuild.
2000-02-23 14:52:23 +01:00
2000-02-23 Linas Vepstas <linas@linas.org>
* i370-dis.c, i370-opc.c: New.
* disassemble.c (ARCH_i370): Define.
(disassembler): Handle it.
* Makefile.am: Add support for Linux/IBM 370.
* configure.in: Likewise.
* Makefile.in: Regenerate.
* configure: Likewise.
2000-02-22 Chandra Chavva <cchavva@redhat.com>
* d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
procedure.
2000-02-22 Andrew Haley <aph@redhat.com>
* mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
force gp32 to zero.
* mips-opc.c (G6): New define.
(mips_builtin_op): Add "move" definition for -gp32.
2000-02-22 Ian Lance Taylor <ian@zembu.com>
From Grant Erickson <gerickso@Brocade.COM>:
* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
2000-02-21 Alan Modra <alan@spri.levels.unisa.edu.au>
* dis-buf.c (buffer_read_memory): Change `length' param and all int
vars to unsigned.
2000-02-17 J"orn Rennecke <amylaar@redhat.co.uk>
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 01:33:36 +01:00
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-14 Fernando Nasser <fnasser@totem.to.redhat.com>
* arm-dis.c: Change flavor name from atpcs-special to
special-atpcs to prevent name conflict in gdb.
(get_arm_regname_num_options, set_arm_regname_option,
get_arm_regnames): New functions. API to access the several
flavor of register names. Note: Used by gdb.
(print_insn_thumb): Use the register name entry from the currently
selected flavor for LR and PC.
2000-02-10 Nick Clifton <nickc@redhat.com>
2000-02-10 22:41:11 +01:00
* mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
classes.
(mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
"mulsh.h" instructions.
* mcore-dis.c (imsk array): Add masks for MULSH and OPSR
classes.
(print_insn_mcore): Add support for little endian targets.
Add support for MULSH and OPSR classes.
2000-02-07 Nick Clifton <nickc@redhat.com>
* arm-dis.c (parse_arm_diassembler_option): Rename again.
Previous delat did not take.
2000-06-16 09:42:12 +02:00
2000-02-03 Timothy Wall <twall@redhat.com>
2000-02-03 19:12:55 +01:00
* dis-buf.c (buffer_read_memory): Use octets_per_byte field
to adjust target address bounds checking and calculate the
appropriate octet offset into data.
2000-06-16 09:42:12 +02:00
2000-01-27 Nick Clifton <nickc@redhat.com>
* arm-dis.c: (parse_disassembler_option): Rename to
parse_arm_disassembler_option and allow to be exported.
* disassemble.c (disassembler_usage): New function: Print out any
target specific disassembler options.
Call arm_disassembler_options() if the ARM architecture is being
2000-06-16 09:42:12 +02:00
supported.
* arm-dis.c (NUM_ELEM): Define this macro if not already
defined.
(arm_regname): New struct type for ARM register names.
(arm_toggle_regnames): Delete.
(parse_disassembler_option): Use register name structure.
(print_insn): New function: Combines duplicate code found in
print_insn_big_arm and print_insn_little_arm.
(print_insn_big_arm): Call print_insn.
(print_insn_little_arm): Call print_insn.
(print_arm_disassembler_options): Display list of supported,
ARM specific disassembler options.
2000-06-16 09:42:12 +02:00
2000-01-27 Thomas de Lellis <tdel@windriver.com>
2000-06-16 09:42:12 +02:00
* arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
ARM_STT_16BIT flag as Thumb code symbols.
2000-06-16 09:42:12 +02:00
* arm-dis.c (printf_insn_little_arm): Ditto.
2000-01-25 Thomas de Lellis <tdel@windriver.com>
* arm-dis.c (printf_insn_thumb): Prevent double dumping
2000-06-16 09:42:12 +02:00
of raw thumb instructions.
2000-01-20 Nick Clifton <nickc@redhat.com>
* mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
2000-01-03 Nick Clifton <nickc@cygnus.com>
* arm-dis.c (streq): New macro.
(strneq): New macro.
(force_thumb): ew local variable.
(parse_disassembler_option): New function: Parse a single, ARM
specific disassembler command line switch.
(parse_disassembler_option): Call parse_disassembler_option to
parse individual command line switches.
(print_insn_big_arm): Check force_thumb.
(print_insn_little_arm): Check force_thumb.
2001-01-11 20:01:42 +01:00
For older changes see ChangeLog-9899
1999-05-03 09:29:11 +02:00
Local Variables:
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