2017-11-22 12:40:32 +01:00
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2017-11-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* testsuite/gas/i386/avx512f_vaes-intel.d: Regenerate.
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* testsuite/gas/i386/avx512f_vaes.d: Likewise.
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* testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Likewise.
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* testsuite/gas/i386/avx512f_vaes-wig1.d: Likewise.
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* testsuite/gas/i386/avx512vl_vaes-intel.d: Likewise.
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* testsuite/gas/i386/avx512vl_vaes.d: Likewise.
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* testsuite/gas/i386/x86-64-avx512f_vaes.s: Add instructions with
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disp8*N.
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* testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Regenerate.
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* testsuite/gas/i386/x86-64-avx512f_vaes.d: Likewise.
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* testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Add instructions with
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disp8*N.
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* testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Regenerate.
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* testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Regenerate.
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* testsuite/gas/i386/x86-64-avx512vl_vaes.d: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Add instructions with
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disp8*N.
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* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Regenerate.
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* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Regenerate.
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2017-11-23 11:04:18 +01:00
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* tc-i386.c (check_VecOperands): Don't clear .disp16.
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* testsuite/gas/i386/avx512f.s: Add 16-bit addressing tests.
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* testsuite/gas/i386/avx512f.d,
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testsuite/gas/i386/avx512f-intel.d: Adjust expectations.
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2017-11-23 11:02:30 +01:00
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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PR gas/22441
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* config/tc-i386.c (build_modrm_byte): Add address override
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prefix checks alongside 64-bit mode ones.
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* testsuite/gas/i386/reloc64.s: Add 32-bit signed/unsigned
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relocation cases.
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* testsuite/gas/i386/reloc64.d: Adjust expectations.
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2017-11-23 11:00:44 +01:00
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (build_modrm_byte): Drop VSIB handling from
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code also setting fake_zero_displacement.
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2017-11-23 10:59:48 +01:00
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/arch-4.s: Correct ud1 and ud2b. Add ud0.
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* testsuite/gas/i386/intel.s: Test ud2 instead of ud2b.
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* testsuite/gas/i386/opcode.s: Likewise.
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* testsuite/gas/i386/arch-4.d, testsuite/gas/i386/intel.d,
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testsuite/gas/i386/opcode.d, testsuite/gas/i386/opcode-intel.d,
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testsuite/gas/i386/opcode-suffix.d: Adjust expectations.
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2017-11-23 10:57:54 +01:00
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2017-11-23 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386-intel.c (i386_intel_operand): Don't call
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as_bad() if a prior error was already reported.
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* testsuite/gas/i386/inval-avx512f.l,
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testsuite/gas/i386/x86-64-inval-avx512f.l: Adjust expectations.
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2017-11-22 20:09:30 +01:00
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2017-11-22 Jim Wilson <jimw@sifive.com>
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2017-11-22 20:20:48 +01:00
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* as.c: Include write.h.
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(common_emul_init): Use FAKE_LABEL_NAME.
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* ecoff.c (add_file, ecoff_directive_end, ecoff_directive_loc):
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Likewise.
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(ecoff_build_symbols): Use FAKE_LABEL_CHAR.
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* expr.c (get_symbol_name): Use FAKE_LABEL_CHAR. Accept only if
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input_from_string is TRUE.
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* read.c (input_from_string): New.
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(read_symbol_name): Use FAKE_LABEL_CHAR. Accept only if
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input_from_string is TRUE.
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(temp_ilp): Set input_from_string to TRUE.
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(restore_ilp): Set input_from_string to FALSE.
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* read.h (input_from_string): Declare.
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* symbols.c: Include write.h
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(S_IS_LOCAL): Check for FAKE_LABEL_CHAR.
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(symbol_relc_make_sym): Fix comment refering to default fake label
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string.
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* write.h (FAKE_LABEL_CHAR): New.
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* config/tc-riscv.h (FAKE_LABEL_CHAR): Define.
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* testsuite/gas/all/err-fakelabel.s: New.
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2017-11-22 20:09:30 +01:00
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* doc/as.texinfo (.align): Change some to most for text nop fill.
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(.balign, .p2align): Likewise.
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2017-11-22 15:02:49 +01:00
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2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (arm_reg_type): Comment on the link with
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reg_expected_msgs.
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(reg_expected_msgs): Initialize using array designators with
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arm_reg_type index.
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2017-11-22 10:46:45 +01:00
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2017-11-22 Claudiu Zissulescu <claziss@synopsys.com>
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* testsuite/gas/arc/hregs-err.s: New test.
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2017-11-22 01:44:29 +01:00
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2017-11-21 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22464
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* testsuite/gas/i386/align-1.s: New file.
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* testsuite/gas/i386/align-1a.d: Likewise.
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* testsuite/gas/i386/align-1b.d: Likewise.
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* testsuite/gas/i386/i386.exp: Run align-1a and align-1b.
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2017-11-21 14:03:03 +01:00
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2017-11-21 Claudiu Zissulescu <claziss@synopsys.com>
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* testsuite/gas/arc/b.d : Update test.
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* testsuite/gas/arc/bl.d: Likewise.
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* testsuite/gas/arc/jli-1.d: Likewise.
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* testsuite/gas/arc/lp.d: Likewise.
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* testsuite/gas/arc/pcl-relocs.d: Likewise.
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* testsuite/gas/arc/pcrel-relocs.d: Likewise.
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* testsuite/gas/arc/pic-relocs.d: Likewise.
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* testsuite/gas/arc/plt-relocs.d: Likewise.
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* testsuite/gas/arc/pseudos.d: Likewise.
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* testsuite/gas/arc/relax-avoid2.d: Likewise.
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* testsuite/gas/arc/relax-avoid3.d: Likewise.
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* testsuite/gas/arc/relax-b.d: Likewise.
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* testsuite/gas/arc/tls-relocs.d: Likewise.
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* testsuite/gas/arc/relax-add01.d: Likewise.
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* testsuite/gas/arc/relax-add04.d: Likewise.
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* testsuite/gas/arc/relax-ld01.d: Likewise.
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* testsuite/gas/arc/relax-sub01.d: Likewise.
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* testsuite/gas/arc/relax-sub02.d: Likewise.
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* testsuite/gas/arc/relax-sub04.d: Likewise.
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* testsuite/gas/arc/pcl-print.s: New file.
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* testsuite/gas/arc/pcl-print.d: Likewise.
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* testsuite/gas/arc/nps400-12.d: Likewise.
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2017-11-21 00:55:18 +01:00
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2017-11-21 Alan Modra <amodra@gmail.com>
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* config/tc-xtensa.c (finish_vinsn): Avoid multiple ngettext calls
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in error message.
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2017-11-20 12:34:30 +01:00
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2017-11-20 Alan Modra <amodra@gmail.com>
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* testsuite/gas/i386/x86-64-reg-bad.l: Accept trailing padding.
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2017-11-16 17:19:37 +01:00
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2017-11-16 Tamar Christina <tamar.christina@arm.com>
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* config/tc-aarch64.c (fp16fml): New.
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* doc/c-aarch64.texi (fp16fml): New.
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* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
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* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.
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2017-11-16 17:15:51 +01:00
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2017-11-16 Tamar Christina <tamar.christina@arm.com>
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* opcodes/aarch64-tbl.h
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(aarch64_feature_crypto): Add ARCH64_FEATURE_SIMD and AARCH64_FEATURE_FP.
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(aarch64_feature_crypto_v8_2, aarch64_feature_sm4): Likewise.
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(aarch64_feature_sha3): Likewise.
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2017-11-16 17:13:01 +01:00
|
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2017-11-16 Tamar Christina <tamar.christina@arm.com>
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* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
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(dotprod): Update default note.
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Add assembler and disassembler support for the new Armv8.4-a instructions for AArch64.
Some of these instructions have been back-ported as optional extensions to
Armv8.2-a and higher, but others are only available for Armv8.4-a.
opcodes/
* aarch64-tbl.h (sha512h, sha512h2, sha512su0, sha512su1, eor3): New.
(rax1, xar, bcax, sm3ss1, sm3tt1a, sm3tt1b, sm3tt2a, sm3tt2b): New.
(sm3partw1, sm3partw2, sm4e, sm4ekey, fmlal, fmlsl): New.
(fmlal2, fmlsl2, cfinv, rmif, setf8, setf16, stlurb): New.
(ldapurb, ldapursb, stlurh, ldapurh, ldapursh, stlur): New.
(ldapur, ldapursw, stlur): New.
* aarch64-dis-2.c: Regenerate.
gas/
* testsuite/gas/aarch64/armv8_4-a-illegal.d: New.
* testsuite/gas/aarch64/armv8_4-a-illegal.l: New.
* testsuite/gas/aarch64/armv8_4-a-illegal.s: New.
* testsuite/gas/aarch64/armv8_4-a.d: New.
* testsuite/gas/aarch64/armv8_4-a.s: New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.s: New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d: New.
* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d: New.
* testsuite/gas/aarch64/armv8_4-a-crypto-fp16.d: New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.s: New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.l: New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d: New.
2017-11-16 17:07:07 +01:00
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|
2017-11-16 Tamar Christina <tamar.christina@arm.com>
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* testsuite/gas/aarch64/armv8_4-a-illegal.d: New.
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* testsuite/gas/aarch64/armv8_4-a-illegal.l: New.
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* testsuite/gas/aarch64/armv8_4-a-illegal.s: New.
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* testsuite/gas/aarch64/armv8_4-a.d: New.
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* testsuite/gas/aarch64/armv8_4-a.s: New.
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* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.s: New.
|
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* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d: New.
|
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|
|
* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d: New.
|
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|
|
* testsuite/gas/aarch64/armv8_4-a-crypto-fp16.d: New.
|
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|
|
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.s: New.
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* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.l: New.
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|
|
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d: New.
|
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|
|
2017-11-16 13:56:45 +01:00
|
|
|
|
2017-11-16 Jan Beulich <jbeulich@suse.com>
|
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|
|
* testsuite/gas/i386/noextreg.s: Add tests with register index
|
|
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|
|
bit 3 set.
|
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|
|
* testsuite/gas/i386/noextreg.d: Adjust expectations.
|
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|
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|
|
2017-11-16 12:28:06 +01:00
|
|
|
|
2017-11-16 Jan Beulich <jbeulich@suse.com>
|
|
|
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|
|
|
|
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|
|
* config/tc-i386.c (process_suffix): Ignore .no_qsuf outside of
|
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|
|
64-bit mode.
|
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|
|
* testsuite/gas/i386/ptwrite.s: Add test for memory operand
|
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|
|
without DWORD PTR.
|
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|
|
* testsuite/gas/i386/ptwrite.d,
|
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|
|
|
testsuite/gas/i386/ptwrite-intel.d: Adjust expectations.
|
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|
|
|
|
|
2017-11-16 11:50:33 +01:00
|
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|
|
2017-11-15 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
|
* testsuite/gas/i386/noextreg.s: Replace .code64/.code32 and
|
|
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|
|
64-bit instructions with .byte. Remove ELF directive.
|
|
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|
|
2017-11-15 16:56:23 +01:00
|
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|
|
2017-11-15 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
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|
|
* config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New.
|
|
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|
|
(do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml.
|
|
|
|
|
|
* doc/c-arm.texi (fp16, fp16fml): New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml.
|
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|
|
* testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml.
|
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|
* testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml.
|
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|
* testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml.
|
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|
|
Add support to readelf and objdump for following links to separate debug information files.
Hi Guys,
I am applying the rather large patch attached to this email to enhance
the readelf and objdump programs so that they now have the ability to
follow links to separate debug info files. (As requested by PR
15152). So for example whereas before we had this output:
$ readelf -wi main.exe
Contents of the .debug_info section:
[...]
<15> DW_AT_comp_dir : (alt indirect string, offset: 0x30c)
[...]
With the new option enabled we get:
$ readelf -wiK main.exe
main.exe: Found separate debug info file: dwz.debug
Contents of the .debug_info section (loaded from main.exe):
[...]
<15> DW_AT_comp_dir : (alt indirect string, offset: 0x30c) /home/nickc/Downloads/dwzm
[...]
The link following feature also means that we can get two lots of
output if the same section exists in both the main file and the
separate debug info file:
$ readelf -wiK main.exe
main.exe: Found separate debug info file: dwz.debug
Contents of the .debug_info section (loaded from main.exe):
[...]
Contents of the .debug_info section (loaded from dwz.debug):
[...]
The patch also adds the ability to display the contents of debuglink
sections:
$ readelf -wk main.exe
Contents of the .gnu_debugaltlink section:
Separate debug info file: dwz.debug
Build-ID (0x14 bytes):
c4 a8 89 8d 64 cf 70 8a 35 68 21 f2 ed 24 45 3e 18 7a 7a 93
Naturally there are long versions of these options (=follow-links and
=links). The documentation has been updated as well, and since both
readelf and objdump use the same set of debug display options, I have
moved the text into a separate file. There are also a couple of new
binutils tests to exercise the new behaviour.
There are a couple of missing features in the current patch however,
although I do intend to address them in follow up submissions:
Firstly the code does not check the build-id inside separate debug
info files when it is searching for a file specified by a
.gnu_debugaltlink section. It just assumes that if the file is there,
then it contains the information being sought.
Secondly I have not checked the DWARF-5 version of these link
features, so there will probably be code to add there.
Thirdly I have only implemented link following for the
DW_FORM_GNU_strp_alt format. Other alternate formats (eg
DW_FORM_GNU_ref_alt) have yet to be implemented.
Lastly, whilst implementing this feature I found it necessary to move
some of the global variables used by readelf (eg section_headers) into
a structure that can be passed around. I have moved all of the global
variables that were necessary to get the patch working, but I need to
complete the operation and move the remaining, file-specific variables
(eg dynamic_strings).
Cheers
Nick
binutils PR 15152
* dwarf.h (enum dwarf_section_display_enum): Add gnu_debuglink,
gnu_debugaltlink and separate_debug_str.
(struct dwarf_section): Add filename field.
Add prototypes for load_separate_debug_file, close_debug_file and
open_debug_file.
* dwarf.c (do_debug_links): New.
(do_follow_links): New.
(separate_debug_file, separate_debug_filename): New.
(fetch_alt_indirect_string): New function. Retrieves a string
from the debug string table in the separate debug info file.
(read_and_display_attr_value): Use it with DW_FORM_GNU_strp_alt.
(load_debug_section_with_follow): New function. Like
load_debug_section, but if the first attempt fails, then tries
again in the separate debug info file.
(introduce): New function.
(process_debug_info): Use load_debug_section_with_follow and
introduce.
(load_debug_info): Likewise.
(display_debug_lines_raw): Likewise.
(display_debug_lines_decoded): Likewise.
(display_debug_macinfo): Likewise.
(display_debug_macro): Likewise.
(display_debug_abbrev): Likewise.
(display_debug_loc): Likewise.
(display_debug_str): Likewise.
(display_debug_aranges): Likewise.
(display_debug_addr); Likewise.
(display_debug_frames): Likewise.
(display_gdb_index): Likewise.
(process_cu_tu_index): Likewise.
(load_cu_tu_indexes): Likewise.
(display_debug_links): New function. Displays the contents of a
.gnu_debuglink or .gnu_debugaltlink section.
(calc_gnu_debuglink_ctc32):New function. Calculates a CRC32
value.
(check_gnu_debuglink): New function. Checks the CRC of a
potential separate debug info file.
(parse_gnu_debuglink): New function. Reads a CRC value out of a
.gnu_debuglink section.
(check_gnu_debugaltlink): New function.
(parse_gnu_debugaltlink): New function. Reads the build-id value
out of a .gnu_debugaltlink section.
(load_separate_debug_info): New function. Finds and loads a
separate debug info file.
(load_separate_debug_file): New function. Attempts to find and
follow a link to a separate debug info file.
(free_debug_memory): Free the separate debug info file
information.
(opts_table): Add "follow-links" and "links".
(dwarf_select_sections_by_letters): Add "k" and "K".
(debug_displays): Reformat. Add .gnu-debuglink and
.gnu_debugaltlink.
Add an extra entry for .debug_str in a separate debug info file.
* doc/binutils.texi: Move description of debug dump features
common to both readelf and objdump into...
* objdump.c (usage): Add -Wk and -WK.
(load_specific_debug_section): Initialise the filename field in
the dwarf_section structure.
(close_debug_file): New function.
(open_debug_file): New function.
(dump_dwarf): Load and dump the separate debug info sections.
* readelf.c (struct filedata): New structure. Contains various
variables that used to be global:
(current_file_size, string_table, string_table_length, elf_header)
(section_headers, program_headers, dump_sects, num_dump_sects):
Move into filedata structure.
(cmdline): New global variable. Contains list of sections to dump
by number, as specified on the command line.
Add filedata parameter to most functions.
(load_debug_section): Load the string table if it has not already
been retrieved.
(close_file): New function.
(close_debug_file): New function.
(open_file): New function.
(open_debug_file): New function.
(process_object): Process sections in any separate debug info files.
* doc/debug.options.texi: New file. Add description of =links and
=follow-links options.
* NEWS: Mention the new feature.
* elfcomm.c: Have the byte gte functions take a const pointer.
* elfcomm.h: Update prototypes.
* testsuite/binutils-all/dw5.W: Update expected output.
* testsuite/binutils-all/objdump.WL: Update expected output.
* testsuite/binutils-all/objdump.exp: Add test of -WK and -Wk.
* testsuite/binutils-all/readelf.exp: Add test of -wK and -wk.
* testsuite/binutils-all/readelf.k: New file.
* testsuite/binutils-all/objdump.Wk: New file.
* testsuite/binutils-all/objdump.WK2: New file.
* testsuite/binutils-all/linkdebug.s: New file.
* testsuite/binutils-all/debuglink.s: New file.
gas * testsuite/gas/avr/large-debug-line-table.d: Update expected
output.
* testsuite/gas/elf/dwarf2-11.d: Likewise.
* testsuite/gas/elf/dwarf2-12.d: Likewise.
* testsuite/gas/elf/dwarf2-13.d: Likewise.
* testsuite/gas/elf/dwarf2-14.d: Likewise.
* testsuite/gas/elf/dwarf2-15.d: Likewise.
* testsuite/gas/elf/dwarf2-16.d: Likewise.
* testsuite/gas/elf/dwarf2-17.d: Likewise.
* testsuite/gas/elf/dwarf2-18.d: Likewise.
* testsuite/gas/elf/dwarf2-5.d: Likewise.
* testsuite/gas/elf/dwarf2-6.d: Likewise.
* testsuite/gas/elf/dwarf2-7.d: Likewise.
ld * testsuite/ld-avr/gc-section-debugline.d: Update expected
output.
2017-11-15 12:34:03 +01:00
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2017-11-15 Nick Clifton <nickc@redhat.com>
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PR 15152
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* testsuite/gas/avr/large-debug-line-table.d: Update expected
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output.
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* testsuite/gas/elf/dwarf2-11.d: Likewise.
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* testsuite/gas/elf/dwarf2-12.d: Likewise.
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* testsuite/gas/elf/dwarf2-13.d: Likewise.
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* testsuite/gas/elf/dwarf2-14.d: Likewise.
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* testsuite/gas/elf/dwarf2-15.d: Likewise.
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* testsuite/gas/elf/dwarf2-16.d: Likewise.
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* testsuite/gas/elf/dwarf2-17.d: Likewise.
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* testsuite/gas/elf/dwarf2-18.d: Likewise.
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* testsuite/gas/elf/dwarf2-5.d: Likewise.
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* testsuite/gas/elf/dwarf2-6.d: Likewise.
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* testsuite/gas/elf/dwarf2-7.d: Likewise.
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2017-11-15 08:52:05 +01:00
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2017-11-15 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/noextreg.s: Add tests for VEX-encoded GPR
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insns with VEX.W set.
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* testsuite/gas/i386/noextreg.d: Adjust expectations.
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2017-11-15 08:51:03 +01:00
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2017-11-15 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/noextreg.{s,d}: New.
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* testsuite/gas/i386/i386.exp: Run new test.
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2017-11-15 08:48:51 +01:00
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2017-11-15 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/x86-64-reg.s: Add extended byte reg tests.
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* testsuite/gas/i386/x86-64-reg.d,
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testsuite/gas/i386/x86-64-reg-intel.d,
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testsuite/gas/i386/ilp32/x86-64-reg.d,
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testsuite/gas/i386/ilp32/x86-64-reg-intel.d: Adjust
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expectations.
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* testsuite/gas/i386/x86-64-reg-bad.{s,l}: New.
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* testsuite/gas/i386/i386.exp: Run new test.
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2017-11-15 02:23:14 +01:00
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2017-11-14 Jim Wilson <jimw@sifive.com>
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* testsuite/gas/lns/lns.exp (lns-common-1): Add riscv*-*-* to alt list.
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2017-11-14 08:43:26 +01:00
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2017-11-14 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/x86-64-xop.d, testsuite/gas/i386/xop.d,
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testsuite/gas/i386/xop32reg.d: Adjust expectations.
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2017-11-14 08:42:26 +01:00
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2017-11-14 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx512bw.s: Add vpcmp* pseudo tests.
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* testsuite/gas/i386/avx512bw_vl.s: Likewise.
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* testsuite/gas/i386/avx512bw.d, testsuite/gas/i386/avx512bw-intel.d,
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testsuite/gas/i386/avx512bw_vl.d,
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testsuite/gas/i386/avx512bw_vl-intel.d: Adjust expectations.
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2017-11-14 08:40:48 +01:00
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2017-11-14 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/string-ok.s: Add a few more valid patterns.
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Move bogus tests ...
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* testsuite/gas/i386/string-bad.s: ... here.
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* testsuite/gas/i386/string-bad.l: Adjust expectations.
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* testsuite/gas/i386/string-ok.d: Likewise.
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* testsuite/gas/i386/string-ok.e: Likewise.
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2017-11-13 12:27:45 +01:00
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2017-11-13 Jan Beulich <jbeulich@suse.com>
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* config/tc-aarch64.c (R_Z_BHSDQ_VZP): Rename to ...
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(R_Z_SP_BHSDQ_VZP): ... and include both stack pointer variants.
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2017-11-13 12:26:48 +01:00
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2017-11-13 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/ia64/group-1.d: Adjust expectations.
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* testsuite/gas/ia64/group-2.d: Likewise.
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* testsuite/gas/ia64/xdata.d: Likewise.
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2017-11-13 12:22:21 +01:00
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2017-11-13 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_suffix): Treat .shiftcount just like
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.inoutportreg.
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* testsuite/gas/i386/inval.s: Add ambiguous shift/rotate cases.
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* testsuite/gas/i386/inval.l: Adjust expectations.
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2017-11-13 12:20:30 +01:00
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2017-11-13 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386-intel.c (i386_intel_simplify_register): Also
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recognize RegRiz/RegEiz as index-only registers.
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* testsuite/gas/i386/intel.s: Add tests exercising base/index
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swapping.
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* testsuite/gas/i386/intel.d: Adjust expectations.
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2017-11-13 12:19:34 +01:00
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2017-11-13 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (i386_index_check): Break out ...
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(i386_addressing_mode): ... this new function.
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* config/tc-i386-intel.c (i386_intel_operand): Do base/index
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swapping and the setting of .baseindex earlier. Call
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i386_addressing_mode.
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* testsuite/gas/i386/x86-64-inval.s: Add out of range
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displacement case.
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* testsuite/gas/i386/x86-64-inval.l: Adjust expectations.
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2017-11-09 18:43:59 +01:00
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2017-11-09 Jim Wilson <jimw@sifive.com>
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* testsuite/gas/elf/dwarf2-10.l: Accept optional line number in error.
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2017-11-09 16:50:56 +01:00
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2017-11-06 Tamar Christina <tamar.christina@arm.com>
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* gas/testsuite/gas/aarch64/dotproduct_armv8_4.s: New.
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* gas/testsuite/gas/aarch64/dotproduct_armv8_4.d: New.
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Add assembler and disassembler support for the new Armv8.4-a registers for AArch64.
Some of these instructions have been back-ported as optional extensions to
Armv8.2-a and higher, but others are only available for Armv8.4-a.
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add ARMv8.4-a registers;
dit, vstcr_el2, vsttbr_el2, cnthvs_tval_el2, cnthvs_cval_el2,
cnthvs_ctl_el2, cnthps_tval_el2, cnthps_cval_el2, cnthps_ctl_el2,
sder32_el2, vncr_el2.
(aarch64_sys_reg_supported_p): Likewise.
(aarch64_pstatefields): Add dit register.
(aarch64_pstatefield_supported_p): Likewise.
(aarch64_sys_regs_tlbi): Add vmalle1os, vae1os, aside1os, vaae1os,
vale1os, vaale1os, ipas2e1os, ipas2le1os, vae2os, vale2os, vmalls12e1os,
vae3os, vale3os, alle2os, alle1os, alle3os, rvae1, rvaae1, rvale1,
rvaale1, rvae1is, rvaae1is, rvale1is, rvaale1is, rvae1os, rvaae1os,
rvale1os, rvaale1os, ripas2e1is, ripas2le1is, ripas2e1, ripas2le1,
ripas2e1os, ripas2le1os, rvae2, rvale2, rvae2is, rvale2is, rvae2os,
rvale2os, rvae3, rvale3, rvae3is, rvale3is, rvae3os, rvale3os.
gas/testsuite
* gas/aarch64/armv8_4-a-registers-illegal.d: New.
* gas/aarch64/armv8_4-a-registers-illegal.l: New.
* gas/aarch64/armv8_4-a-registers-illegal.s: New.
* gas/aarch64/armv8_4-a-registers.d: New.
* gas/aarch64/armv8_4-a-registers.s: New.
2017-11-09 16:48:43 +01:00
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2017-11-09 Tamar Christina <tamar.christina@arm.com>
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* gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.d: New.
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* gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.l: New.
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* gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.s: New.
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* gas/testsuite/gas/aarch64/armv8_4-a-registers.d: New.
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* gas/testsuite/gas/aarch64/armv8_4-a-registers.s: New.
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Adds the new Fields and Operand types for the new instructions in Armv8.4-a.
gas/
* config/tc-aarch64.c (process_omitted_operand):
Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2
and AARCH64_OPND_IMM_2.
(parse_operands): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
AARCH64_OPND_IMM_2, AARCH64_OPND_MASK
and AARCH64_OPND_ADDR_OFFSET.
include/
* opcode/aarch64.h:
(aarch64_opnd): Add AARCH64_OPND_Va, AARCH64_OPND_MASK,
AARCH64_OPND_IMM_2, AARCH64_OPND_ADDR_OFFSET
and AARCH64_OPND_SM3_IMM2.
(aarch64_insn_class): Add cryptosm3 and cryptosm4.
(arch64_feature_set): Make uint64_t.
opcodes/
* aarch64-asm.h (ins_addr_offset): New.
* aarch64-asm.c (aarch64_ins_reglane): Add cryptosm3.
(aarch64_ins_addr_offset): New.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis.h (ext_addr_offset): New.
* aarch64-dis.c (aarch64_ext_reglane): Add cryptosm3.
(aarch64_ext_addr_offset): New.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc.h (aarch64_field_kind): Add FLD_imm6_2,
FLD_imm4_2 and FLD_SM3_imm2.
* aarch64-opc.c (fields): Add FLD_imm6_2,
FLD_imm4_2 and FLD_SM3_imm2.
(operand_general_constraint_met_p): Add AARCH64_OPND_ADDR_OFFSET.
(aarch64_print_operand): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
AARCH64_OPND_MASK, AARCH64_OPND_IMM_2 and AARCH64_OPND_ADDR_OFFSET.
* aarch64-opc-2.c (Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2): New.
* aarch64-tbl.h
(aarch64_opcode_table): Add Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2.
2017-11-09 16:22:30 +01:00
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2017-11-09 Tamar Christina <tamar.christina@arm.com>
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* config/tc-aarch64.c (process_omitted_operand):
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Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2
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and AARCH64_OPND_IMM_2.
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(parse_operands): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
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AARCH64_OPND_IMM_2, AARCH64_OPND_MASK
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and AARCH64_OPND_ADDR_OFFSET.
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Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options (+aes and +sha2). The reason for the split is because with the introduction of Armv8.4-a the implementation of AES has explicitly been made independent of the implementation of the other crypto extensions.
gas * config/tc-aarch64.c (aarch64_arch_option_table): Add armv8.4-a.
(aarch64_features): Added SM4 and SHA3.
include * opcode/aarch64.h:
(AARCH64_FEATURE_V8_4, AARCH64_FEATURE_SM4): New.
(AARCH64_ARCH_V8_4, AARCH64_FEATURE_SHA3): New.
opcodes * aarch64-tbl.h
(aarch64_feature_v8_4, aarch64_feature_crypto_v8_2): New.
(aarch64_feature_sm4, aarch64_feature_sha3): New.
(aarch64_feature_fp_16_v8_2): New.
(ARMV8_4, SHA3, SM4, CRYPTO_V8_2, FP_F16_V8_2): New.
(V8_4_INSN, CRYPTO_V8_2_INSN): New.
(SHA3_INSN, SM4_INSN, FP16_V8_2_INSN): New.
2017-11-09 12:21:31 +01:00
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2017-11-09 Tamar Christina <tamar.christina@arm.com>
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* config/tc-aarch64.c (aarch64_arch_option_table): Add armv8.4-a.
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(aarch64_features): Add SM4 and SHA3.
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Split the AArch64 Crypto instructions for AES and SHA1+2 into their own options (+aes and +sha2).
The new options are:
+aes: Enables the AES instructions of Armv8-a,
enabled by default with +crypto.
+sha2: Enables the SHA1 and SHA2 instructions of Armv8-a,
enabled by default with +crypto.
These options have been turned on by default when +crypto
is used, as such no breakage is expected.
The reason for the split is because with the introduction of Armv8.4-a
the implementation of AES has explicitly been made independent of the
implementation of the other crypto extensions. Backporting the split does
not break any of the previous requirements and so is safe to do.
gas * config/tc-aarch64.c
(aarch64_features): Include AES and SHA2 in CRYPTO.
Add SHA2 and AES.
include * opcode/aarch64.h:
(AARCH64_FEATURE_SHA2, AARCH64_FEATURE_AES): New.
opcodes * aarch64-tbl.h (aarch64_feature_crypto): Add AES and SHA2.
(aarch64_feature_sha2, aarch64_feature_aes): New.
(SHA2, AES): New.
(AES_INSN, SHA2_INSN): New.
(pmull, pmull2, aese, aesd, aesmc, aesimc): Change to AES_INS.
(sha1h, sha1su1, sha256su0, sha1c, sha1p,
sha1m, sha1su0, sha256h, sha256h2, sha256su1):
Change to SHA2_INS.
2017-11-08 15:30:53 +01:00
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2017-11-08 Tamar Christina <tamar.christina@arm.com>
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2017-11-08 15:34:32 +01:00
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* config/tc-aarch64.c
|
Split the AArch64 Crypto instructions for AES and SHA1+2 into their own options (+aes and +sha2).
The new options are:
+aes: Enables the AES instructions of Armv8-a,
enabled by default with +crypto.
+sha2: Enables the SHA1 and SHA2 instructions of Armv8-a,
enabled by default with +crypto.
These options have been turned on by default when +crypto
is used, as such no breakage is expected.
The reason for the split is because with the introduction of Armv8.4-a
the implementation of AES has explicitly been made independent of the
implementation of the other crypto extensions. Backporting the split does
not break any of the previous requirements and so is safe to do.
gas * config/tc-aarch64.c
(aarch64_features): Include AES and SHA2 in CRYPTO.
Add SHA2 and AES.
include * opcode/aarch64.h:
(AARCH64_FEATURE_SHA2, AARCH64_FEATURE_AES): New.
opcodes * aarch64-tbl.h (aarch64_feature_crypto): Add AES and SHA2.
(aarch64_feature_sha2, aarch64_feature_aes): New.
(SHA2, AES): New.
(AES_INSN, SHA2_INSN): New.
(pmull, pmull2, aese, aesd, aesmc, aesimc): Change to AES_INS.
(sha1h, sha1su1, sha256su0, sha1c, sha1p,
sha1m, sha1su0, sha256h, sha256h2, sha256su1):
Change to SHA2_INS.
2017-11-08 15:30:53 +01:00
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(aarch64_features): Include AES and SHA2 in CRYPTO.
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Add SHA2 and AES.
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2017-11-08 14:15:12 +01:00
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2017-11-08 Jiong Wang <jiong.wang@arm.com>
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Tamar Christina <tamar.christina@arm.com>
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* config/tc-arm.c (arm_extensions):
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(arm_archs): New entry for "armv8.4-a".
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Add FPU_ARCH_DOTPROD_NEON_VFP_ARMV8.
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(arm_ext_v8_2): New variable.
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(enum arm_reg_type): New enumeration REG_TYPE_NSD.
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(reg_expected_msgs): New entry for REG_TYPE_NSD.
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(parse_typed_reg_or_scalar): Handle REG_TYPE_NSD.
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(parse_scalar): Support REG_TYPE_VFS.
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(enum operand_parse_code): New enumerations OP_RNSD and OP_RNSD_RNSC.
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(parse_operands): Handle OP_RNSD and OP_RNSD_RNSC.
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(NEON_SHAPE_DEF): New entries for DHH and DHS.
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(neon_scalar_for_fmac_fp16_long): New function to generate Rm encoding
|
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for new FP16 instructions in ARMv8.2-A.
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(do_neon_fmac_maybe_scalar_long): New function to encode new FP16
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instructions in ARMv8.2-A.
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(do_neon_vfmal): Wrapper function for vfmal.
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(do_neon_vfmsl): Wrapper function for vfmsl.
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(insns): New entries for vfmal and vfmsl.
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* doc/c-arm.texi (-march): Document "armv8.4-a".
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* testsuite/gas/arm/dotprod-mandatory.d: New test.
|
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* testsuite/gas/arm/armv8_2-a-fp16.s: New test source.
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* testsuite/gas/arm/armv8_2-a-fp16-illegal.s: New test source.
|
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* testsuite/gas/arm/armv8_2-a-fp16.d: New test.
|
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* testsuite/gas/arm/armv8_3-a-fp16.d: New test.
|
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* testsuite/gas/arm/armv8_4-a-fp16.d: New test.
|
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* testsuite/gas/arm/armv8_2-a-fp16-thumb2.d: New test.
|
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* testsuite/gas/arm/armv8_2-a-fp16-illegal.d: New test.
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* testsuite/gas/arm/armv8_2-a-fp16-illegal.l: New error file.
|
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2017-11-07 07:33:41 +01:00
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|
2017-11-08 Alan Modra <amodra@gmail.com>
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* config/tc-xtensa.c (finish_vinsn): Properly pluralize error message.
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2017-11-07 01:32:08 +01:00
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2017-11-07 Jim Wilson <jimw@sifive.com>
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* config/tc-riscv.c (append_insn): Call frag_wane and frag_new at
|
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end for linker optimizable relocs.
|
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|
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* testsuite/gas/riscv/eh-relocs.d: New.
|
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|
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|
* testsuite/gas/riscv/eh-relocs.s: New.
|
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* testsuite/gas/riscv/riscv.exp: Run eh-relocs test.
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2017-11-06 22:22:42 +01:00
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|
2017-11-07 Palmer Dabbelt <palmer@dabbelt.com>
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* testsuite/gas/riscv/satp.d: New test.
|
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testsuite/gas/riscv/satp.s: Likewise.
|
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testsuite/gas/riscv/riscv.exp: Likewise.
|
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config/tc-riscv.c (md_begin): Handle CSR aliases.
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2017-11-07 11:17:21 +01:00
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2017-11-07 Tamar Christina <tamar.christina@arm.com>
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* config/tc-arm.c (arm_cpus):
|
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Change FPU_ARCH_CRYPTO_NEON_VFP_ARMV8
|
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into FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD.
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2017-11-07 07:02:07 +01:00
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|
2017-11-07 Alan Modra <amodra@gmail.com>
|
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* read.c (assemble_one, s_bundle_unlock): Formatting.
|
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Consistently add comma and "bytes" to error message.
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* testsuite/gas/i386/bundle-bad.l: Adjust to suit.
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|
readelf ngettext fixes
This patch is a first pass at fixing readelf message pluralization.
I've deliberately not fixed the "out of memory" errors since it's very
unlikely that they will ever be complaining about not being able to
allocate for a single entry, and a few others where the size is very
unlikely to be 1 byte.
Then there are messages like this one:
"Out of %lu items there are %zu bucket clashes (longest of %zu entries).\n"
I suppose this could be split into three parts, "Of %lu items ",
"there are %zu bucket clashes ", and "(longest of %zu entries).\n",
each part being printed separately, but that might not be ideal for
sentence construction in other languages. For now I'm punting on this
one.
Changes to readelf output require lots of testsuite adjustment..
binutils/
* dwarf.c (read_uleb128): Properly pluralize messages.
(display_debug_lines_raw, display_debug_loc): Likewise.
(display_debug_names, process_cu_tu_index): Likewise.
* od-macho.c (dump_code_signature_superblob): Likewise.
* readelf.c (process_program_headers): Likewise.
(process_section_header, process_relocs): Likewise.
(hppa_process_unwind, arm_process_unwind): Likewise.
(process_dynamic_section, process_version_sections): Likewise.
(process_symbol_table, process_syminfo): Likewise.
(apply_relocations, process_mips_specific): Likewise.
(process_gnu_liblist, process_notes_at): Likewise.
(process_archive): Likewise.
* testsuite/binutils-all/dw2-1.W,
* testsuite/binutils-all/dw2-3.W,
* testsuite/binutils-all/dw2-3gabi.W,
* testsuite/binutils-all/dw5.S,
* testsuite/binutils-all/dw5.W,
* testsuite/binutils-all/i386/compressed-1a.d,
* testsuite/binutils-all/libdw2-compressedgabi.out,
* testsuite/binutils-all/objdump.W,
* testsuite/binutils-all/readelf.r,
* testsuite/binutils-all/readelf.r-64,
* testsuite/binutils-all/x86-64/compressed-1a.d: Update
for pluralization fixes.
gas/
* testsuite/gas/arm/got_prel.d,
* testsuite/gas/elf/dwarf2-1.d,
* testsuite/gas/elf/dwarf2-2.d,
* testsuite/gas/elf/dwarf2-3.d,
* testsuite/gas/elf/dwarf2-5.d,
* testsuite/gas/elf/dwarf2-6.d,
* testsuite/gas/i386/debug1.d,
* testsuite/gas/i386/dw2-compress-1.d,
* testsuite/gas/i386/dw2-compress-3a.d,
* testsuite/gas/i386/dw2-compress-3b.d,
* testsuite/gas/i386/dw2-compressed-1.d,
* testsuite/gas/i386/dw2-compressed-3a.d,
* testsuite/gas/i386/dw2-compressed-3b.d,
* testsuite/gas/i386/ilp32/x86-64-localpic.d,
* testsuite/gas/i386/localpic.d,
* testsuite/gas/i386/x86-64-localpic.d,
* testsuite/gas/ia64/pr13167.d,
* testsuite/gas/mips/loc-swap-2.d,
* testsuite/gas/mips/loc-swap.d,
* testsuite/gas/mips/micromips@loc-swap-2.d,
* testsuite/gas/mips/micromips@loc-swap.d,
* testsuite/gas/mips/mips16-dwarf2-n32.d,
* testsuite/gas/mips/mips16-dwarf2.d,
* testsuite/gas/mips/mips16@loc-swap-2.d,
* testsuite/gas/mips/mips16@loc-swap.d,
* testsuite/gas/mips/mips16e@loc-swap.d,
* testsuite/gas/mmix/bspec-1.d,
* testsuite/gas/mmix/bspec-2.d,
* testsuite/gas/tic6x/unwind-1.d,
* testsuite/gas/tic6x/unwind-2.d,
* testsuite/gas/tic6x/unwind-3.d: Update for pluralization
fixes.
ld/
* testsuite/ld-aarch64/ifunc-13.d,
* testsuite/ld-aarch64/ifunc-15.d,
* testsuite/ld-aarch64/ifunc-20.d,
* testsuite/ld-alpha/tlsbin.rd,
* testsuite/ld-alpha/tlspic.rd,
* testsuite/ld-arm/ifunc-3.rd,
* testsuite/ld-arm/ifunc-9.rd,
* testsuite/ld-arm/unwind-mix.d,
* testsuite/ld-arm/unwind-rel.d,
* testsuite/ld-cris/hiddef1.d,
* testsuite/ld-cris/libdso-13.d,
* testsuite/ld-cris/libdso-2.d,
* testsuite/ld-cris/pr16044.d,
* testsuite/ld-cris/tls-local-63.d,
* testsuite/ld-cris/tls-local-64.d,
* testsuite/ld-cris/tls-und-38.d,
* testsuite/ld-cris/tls-und-42.d,
* testsuite/ld-cris/tls-und-46.d,
* testsuite/ld-cris/tls-und-50.d,
* testsuite/ld-cris/weakref3.d,
* testsuite/ld-cris/weakref4.d,
* testsuite/ld-elf/comm-data2r.rd,
* testsuite/ld-elf/discard1.d,
* testsuite/ld-elf/discard2.d,
* testsuite/ld-elf/pr19539.d,
* testsuite/ld-elf/pr22374-1.r,
* testsuite/ld-elf/pr22374-2.r,
* testsuite/ld-i386/combreloc.d,
* testsuite/ld-i386/emit-relocs-nacl.rd,
* testsuite/ld-i386/emit-relocs.rd,
* testsuite/ld-i386/pr13302.d,
* testsuite/ld-i386/pr17709-nacl.rd,
* testsuite/ld-i386/pr17709.rd,
* testsuite/ld-i386/pr19539.d,
* testsuite/ld-i386/pr19615.d,
* testsuite/ld-i386/pr19636-1a.d,
* testsuite/ld-i386/pr19636-1e.d,
* testsuite/ld-i386/pr19636-1f.d,
* testsuite/ld-i386/pr19636-2a.d,
* testsuite/ld-i386/pr19636-2b.d,
* testsuite/ld-i386/pr19636-2d-nacl.d,
* testsuite/ld-i386/pr19636-2e-nacl.d,
* testsuite/ld-i386/pr19636-3a.d,
* testsuite/ld-i386/pr19636-3d.d,
* testsuite/ld-i386/pr19636-3e.d,
* testsuite/ld-i386/pr19636-4a.d,
* testsuite/ld-i386/pr19645.d,
* testsuite/ld-i386/pr19827-nacl.rd,
* testsuite/ld-i386/pr19827.rd,
* testsuite/ld-i386/pr20253-4a.d,
* testsuite/ld-i386/pr20253-4b.d,
* testsuite/ld-i386/pr20253-5.d,
* testsuite/ld-i386/tlsbin-nacl.rd,
* testsuite/ld-i386/tlsbin.rd,
* testsuite/ld-i386/tlspic-nacl.rd,
* testsuite/ld-i386/tlspic.rd,
* testsuite/ld-i386/undefweakb.d,
* testsuite/ld-ia64/tlsbin.rd,
* testsuite/ld-ia64/tlspic.rd,
* testsuite/ld-ifunc/ifunc-13-i386.d,
* testsuite/ld-ifunc/ifunc-13-x86-64.d,
* testsuite/ld-ifunc/ifunc-15-i386.d,
* testsuite/ld-ifunc/ifunc-15-x86-64.d,
* testsuite/ld-ifunc/ifunc-20-i386.d,
* testsuite/ld-ifunc/ifunc-20-x86-64.d,
* testsuite/ld-ifunc/ifunc-23a-x86.d,
* testsuite/ld-ifunc/ifunc-23b-x86.d,
* testsuite/ld-ifunc/ifunc-23c-x86.d,
* testsuite/ld-ifunc/ifunc-24a-x86.d,
* testsuite/ld-ifunc/ifunc-24b-x86.d,
* testsuite/ld-ifunc/ifunc-24c-x86.d,
* testsuite/ld-ifunc/ifunc-25a-x86.d,
* testsuite/ld-ifunc/ifunc-25b-x86.d,
* testsuite/ld-ifunc/ifunc-25c-x86.d,
* testsuite/ld-m68k/got-1.d,
* testsuite/ld-mips-elf/vxworks1.rd,
* testsuite/ld-powerpc/ambiguousv1.d,
* testsuite/ld-powerpc/ambiguousv1b.d,
* testsuite/ld-powerpc/ambiguousv2.d,
* testsuite/ld-powerpc/ambiguousv2b.d,
* testsuite/ld-powerpc/tlsexe.r,
* testsuite/ld-powerpc/tlsexe32.r,
* testsuite/ld-powerpc/tlsexetoc.r,
* testsuite/ld-powerpc/tlsso.r,
* testsuite/ld-powerpc/tlsso32.r,
* testsuite/ld-powerpc/tlstocso.r,
* testsuite/ld-powerpc/vle-multiseg-1.d,
* testsuite/ld-powerpc/vle-multiseg-2.d,
* testsuite/ld-powerpc/vle-multiseg-3.d,
* testsuite/ld-s390/tlsbin.rd,
* testsuite/ld-s390/tlsbin_64.rd,
* testsuite/ld-s390/tlspic.rd,
* testsuite/ld-s390/tlspic_64.rd,
* testsuite/ld-sh/ld-r-1.d,
* testsuite/ld-sh/sh64/gotplt.d,
* testsuite/ld-sh/shared-1.d,
* testsuite/ld-sh/tlsbin-2.d,
* testsuite/ld-sh/tlspic-2.d,
* testsuite/ld-sparc/gotop32.rd,
* testsuite/ld-sparc/gotop64.rd,
* testsuite/ld-sparc/tlssunpic32.rd,
* testsuite/ld-sparc/tlssunpic64.rd,
* testsuite/ld-sparc/vxworks1-lib.rd,
* testsuite/ld-tic6x/shlib-app-1.rd,
* testsuite/ld-tic6x/shlib-app-1b.rd,
* testsuite/ld-tic6x/shlib-app-1r.rd,
* testsuite/ld-tic6x/shlib-app-1rb.rd,
* testsuite/ld-tic6x/shlib-noindex.rd,
* testsuite/ld-vax-elf/export-class-data.rd,
* testsuite/ld-x86-64/pr13082-1a.d,
* testsuite/ld-x86-64/pr13082-1b.d,
* testsuite/ld-x86-64/pr13082-2a.d,
* testsuite/ld-x86-64/pr13082-2b.d,
* testsuite/ld-x86-64/pr13082-3a.d,
* testsuite/ld-x86-64/pr13082-3c.d,
* testsuite/ld-x86-64/pr13082-4a.d,
* testsuite/ld-x86-64/pr13082-5a.d,
* testsuite/ld-x86-64/pr13082-5b.d,
* testsuite/ld-x86-64/pr13082-6a.d,
* testsuite/ld-x86-64/pr13082-6b.d,
* testsuite/ld-x86-64/pr17709-nacl.rd,
* testsuite/ld-x86-64/pr17709.rd,
* testsuite/ld-x86-64/pr19539a.d,
* testsuite/ld-x86-64/pr19539b.d,
* testsuite/ld-x86-64/pr19615.d,
* testsuite/ld-x86-64/pr19636-1a.d,
* testsuite/ld-x86-64/pr19636-1d.d,
* testsuite/ld-x86-64/pr19636-1e.d,
* testsuite/ld-x86-64/pr19636-2a.d,
* testsuite/ld-x86-64/pr19636-2e.d,
* testsuite/ld-x86-64/pr19636-2f.d,
* testsuite/ld-x86-64/pr19636-3a.d,
* testsuite/ld-x86-64/pr19645.d,
* testsuite/ld-x86-64/pr19807-2b.d,
* testsuite/ld-x86-64/pr19807-2d.d,
* testsuite/ld-x86-64/pr19827-nacl.rd,
* testsuite/ld-x86-64/pr19827.rd,
* testsuite/ld-x86-64/pr20253-4a.d,
* testsuite/ld-x86-64/pr20253-4b.d,
* testsuite/ld-x86-64/pr20253-4d.d,
* testsuite/ld-x86-64/pr20253-4e.d,
* testsuite/ld-x86-64/pr20253-5a.d,
* testsuite/ld-x86-64/pr20253-5b.d,
* testsuite/ld-x86-64/tlsbin-nacl.rd,
* testsuite/ld-x86-64/tlsbin.rd,
* testsuite/ld-x86-64/tlspic-nacl.rd,
* testsuite/ld-x86-64/tlspic.rd,
* testsuite/ld-x86-64/tlspic2-nacl.rd: Update for
pluralization fixes.
2017-11-07 01:48:29 +01:00
|
|
|
|
2017-11-07 Alan Modra <amodra@gmail.com>
|
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|
|
|
|
|
|
|
* testsuite/gas/arm/got_prel.d,
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-1.d,
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* testsuite/gas/elf/dwarf2-2.d,
|
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* testsuite/gas/elf/dwarf2-3.d,
|
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* testsuite/gas/elf/dwarf2-5.d,
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* testsuite/gas/elf/dwarf2-6.d,
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* testsuite/gas/i386/debug1.d,
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* testsuite/gas/i386/dw2-compress-1.d,
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* testsuite/gas/i386/dw2-compress-3a.d,
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* testsuite/gas/i386/dw2-compress-3b.d,
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* testsuite/gas/i386/dw2-compressed-1.d,
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* testsuite/gas/i386/dw2-compressed-3a.d,
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* testsuite/gas/i386/dw2-compressed-3b.d,
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* testsuite/gas/i386/ilp32/x86-64-localpic.d,
|
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* testsuite/gas/i386/localpic.d,
|
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* testsuite/gas/i386/x86-64-localpic.d,
|
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* testsuite/gas/ia64/pr13167.d,
|
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* testsuite/gas/mips/loc-swap-2.d,
|
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* testsuite/gas/mips/loc-swap.d,
|
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|
|
* testsuite/gas/mips/micromips@loc-swap-2.d,
|
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|
* testsuite/gas/mips/micromips@loc-swap.d,
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|
* testsuite/gas/mips/mips16-dwarf2-n32.d,
|
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|
|
* testsuite/gas/mips/mips16-dwarf2.d,
|
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|
* testsuite/gas/mips/mips16@loc-swap-2.d,
|
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* testsuite/gas/mips/mips16@loc-swap.d,
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* testsuite/gas/mips/mips16e@loc-swap.d,
|
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* testsuite/gas/mmix/bspec-1.d,
|
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* testsuite/gas/mmix/bspec-2.d,
|
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|
* testsuite/gas/tic6x/unwind-1.d,
|
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|
* testsuite/gas/tic6x/unwind-2.d,
|
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|
|
|
|
* testsuite/gas/tic6x/unwind-3.d: Update for pluralization
|
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|
fixes.
|
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|
2017-11-06 10:14:02 +01:00
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|
2017-11-07 Alan Modra <amodra@gmail.com>
|
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|
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|
* as.c (main): Properly pluralize messages.
|
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|
|
|
* frags.c (frag_grow): Likewise.
|
|
|
|
|
|
* read.c (emit_expr_with_reloc, emit_expr_fix): Likewise.
|
|
|
|
|
|
(parse_bitfield_cons): Likewise.
|
|
|
|
|
|
* write.c (fixup_segment, compress_debug, write_contents): Likewise.
|
|
|
|
|
|
(relax_segment): Likewise.
|
|
|
|
|
|
* config/tc-arm.c (s_arm_elf_cons): Likewise.
|
|
|
|
|
|
* config/tc-cr16.c (l_cons): Likewise.
|
|
|
|
|
|
* config/tc-i370.c (i370_elf_cons): Likewise.
|
|
|
|
|
|
* config/tc-m68k.c (m68k_elf_cons): Likewise.
|
|
|
|
|
|
* config/tc-msp430.c (msp430_operands): Likewise.
|
|
|
|
|
|
* config/tc-s390.c (s390_elf_cons, s390_literals): Likewise.
|
|
|
|
|
|
* config/tc-mcore.c (md_apply_fix): Likewise.
|
|
|
|
|
|
* config/tc-tic54x.c (md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_elf_cons): Likewise.
|
|
|
|
|
|
(xg_expand_assembly_insn): Likewise.
|
|
|
|
|
|
* config/xtensa-relax.c (build_transition): Likewise.
|
|
|
|
|
|
|
ngettext support
binutils has lacked proper pluralization of output messages for a long
time, for example, readelf will display information about a section
that "contains 1 entries" or "There are 1 section headers". Fixing
this properly requires us to use ngettext, because other languages
have different rules to English.
This patch defines macros for ngettext and friends to handle builds
with --disable-nls, and tidies the existing nls support. I've
redefined gettext rather than just defining "_" as dgettext in bfd and
opcodes in case someone wants to use gettext there (which might
conceivably happen with generated code).
bfd/
* sysdep.h: Formatting, comment fixes.
(gettext, ngettext): Redefine when ENABLE_NLS.
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
(_): Define using gettext.
(textdomain, bindtextdomain): Use safer "do nothing".
* hosts/alphavms.h (textdomain, bindtextdomain): Likewise.
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
opcodes/
* opintl.h: Formatting, comment fixes.
(gettext, ngettext): Redefine when ENABLE_NLS.
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
(_): Define using gettext.
(textdomain, bindtextdomain): Use safer "do nothing".
binutils/
* sysdep.h (textdomain, bindtextdomain): Use safer "do nothing".
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
gas/
* asintl.h (textdomain, bindtextdomain): Use safer "do nothing".
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
gold/
* system.h (textdomain, bindtextdomain): Use safer "do nothing".
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
ld/
* ld.h (textdomain, bindtextdomain): Use safer "do nothing".
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
2017-11-06 05:50:00 +01:00
|
|
|
|
2017-11-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* asintl.h (textdomain, bindtextdomain): Use safer "do nothing".
|
|
|
|
|
|
(ngettext, dngettext, dcngettext): Define when !ENABLE_NLS.
|
|
|
|
|
|
|
2017-11-03 15:03:03 +01:00
|
|
|
|
2017-11-03 Siddhesh Poyarekar <siddhesh.poyarekar@linaro.org>
|
|
|
|
|
|
Jim Wilson <jim.wilson@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_cpus): Add saphira.
|
|
|
|
|
|
* doc/c-aarch64.texi: Likewise.
|
|
|
|
|
|
|
2017-11-02 15:16:22 +01:00
|
|
|
|
2017-11-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: Add
|
|
|
|
|
|
--disassembler-options=force-thumb to objdump options.
|
|
|
|
|
|
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: Likewise.
|
|
|
|
|
|
|
FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
Part 2 adds a relaxation pass, which actually implements the code compression scheme.
bfd * archures.c: Add bfd_mach_ft32b.
* cpu-ft32.c: Add arch_info_struct.
* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
DIFF32. (ft32_elf_relocate_section): Add clauses
for R_FT32_SC0, SC1, DIFF32. (ft32_reloc_shortable,
elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
elf32_ft32_adjust_reloc_if_spans_insn,
elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
ft32_elf_relax_section): New function.
* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas * config/tc-ft32.c (md_assemble): add relaxation reloc
BFD_RELOC_FT32_RELAX. (md_longopts): Add "norelax" and
"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
ft32_allow_local_subtract): New function.
* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
shortcodes.
include * elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
2017-11-01 16:33:24 +01:00
|
|
|
|
2017-11-01 James Bowman <james.bowman@ftdichip.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ft32.c (md_assemble): Add relaxation reloc
|
|
|
|
|
|
BFD_RELOC_FT32_RELAX.
|
|
|
|
|
|
(md_longopts): Add "norelax" and "no-relax".
|
|
|
|
|
|
(md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
|
|
|
|
|
|
(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
|
|
|
|
|
|
ft32_allow_local_subtract): New function.
|
|
|
|
|
|
* config/tc-ft32.h: Remove unused MD_PCREL_FROM_SECTION.
|
|
|
|
|
|
* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
|
|
|
|
|
|
shortcodes.
|
|
|
|
|
|
* testsuite/gas/ft32/insnsc.d: New driver file.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Update.
|
|
|
|
|
|
* testsuite/gas/ft32/ft32.exp: Run the new test.
|
|
|
|
|
|
* testsuite/gas/ft32/insn.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-11.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-12.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-13.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-14.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-15.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-16.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-17.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-18.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-3.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-5.d: Update.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-7.d: Update.
|
|
|
|
|
|
|
[ARM] Fix Coprocessor instructions availability
A few coprocessor instructions introduced in ARMv2 are currently
accepted by GAS when targeting ARMv1 due to a typo in the code. This
patch fixes the issue and introduce a more fine grained testing for
coprocessor instructions availability. Coprocessor instructions are
grouped as follows:
* ARM coprocessor instructions introduced in ARMv2
Includes: ldc, stc, mcr, mrc, cdp, ldcl, stcl
Guarded by: ARM_EXT_V2
Tests: copro-arm_v2plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5
Includes: ldc2, ldc2l, stc2, stc2l, cdp2, mcr2, mrc2
Guarded by: ARM_EXT_V5
Tests: copro-arm_v5plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5TE
Includes: mcrr, mrrc
Guarded by: ARM_EXT_V5E
Tests: copro-arm_v5teplus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv6
Includes: mcrr2, mrrc2
Guarded by: ARM_EXT_V6
Tests: copro-arm_v6plus-arm_v*.d
* Thumb coprocessor instructions introduced in ARMv6T2
Includes: ldc, ldcl, stc, stcl, mcr, mrc, mcrr, mrrc, cdp, ldc2,
ldc2l, stc2, stc2l, cdp2, mcr2, mrc2, mcrr2, mrrc2
Guarded by: ARM_EXT_V6T2
Tests: copro-thumb_v6t2plus-thumb_v*.d
For each of these groups, at least 2 tests are performed:
* instructions are not available in earlier architecture
* instructions are available in architecture where they were introduced
More tests need to be performed when instructions in a group span
several assembly files.
Note that an instruction in the original coprocessor testcase is
changed to unified syntax to allow the testcase to be assembled for ARM
and Thumb state. Correct processing of legacy syntax is covered in other
testcases.
2017-11-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit.
* testsuite/gas/arm/copro.s: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while
changing it to unified syntax and ...
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ...
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ...
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This.
* testsuite/gas/arm/copro.d: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2
and ...
* testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5
and ...
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target
ARMv5TE and ...
* testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6.
* testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected
errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase.
2017-11-01 10:49:13 +01:00
|
|
|
|
2017-11-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit.
|
FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
Part 2 adds a relaxation pass, which actually implements the code compression scheme.
bfd * archures.c: Add bfd_mach_ft32b.
* cpu-ft32.c: Add arch_info_struct.
* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
DIFF32. (ft32_elf_relocate_section): Add clauses
for R_FT32_SC0, SC1, DIFF32. (ft32_reloc_shortable,
elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
elf32_ft32_adjust_reloc_if_spans_insn,
elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
ft32_elf_relax_section): New function.
* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas * config/tc-ft32.c (md_assemble): add relaxation reloc
BFD_RELOC_FT32_RELAX. (md_longopts): Add "norelax" and
"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
ft32_allow_local_subtract): New function.
* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
shortcodes.
include * elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
2017-11-01 16:33:24 +01:00
|
|
|
|
* testsuite/gas/arm/copro.s: Split into
|
[ARM] Fix Coprocessor instructions availability
A few coprocessor instructions introduced in ARMv2 are currently
accepted by GAS when targeting ARMv1 due to a typo in the code. This
patch fixes the issue and introduce a more fine grained testing for
coprocessor instructions availability. Coprocessor instructions are
grouped as follows:
* ARM coprocessor instructions introduced in ARMv2
Includes: ldc, stc, mcr, mrc, cdp, ldcl, stcl
Guarded by: ARM_EXT_V2
Tests: copro-arm_v2plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5
Includes: ldc2, ldc2l, stc2, stc2l, cdp2, mcr2, mrc2
Guarded by: ARM_EXT_V5
Tests: copro-arm_v5plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5TE
Includes: mcrr, mrrc
Guarded by: ARM_EXT_V5E
Tests: copro-arm_v5teplus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv6
Includes: mcrr2, mrrc2
Guarded by: ARM_EXT_V6
Tests: copro-arm_v6plus-arm_v*.d
* Thumb coprocessor instructions introduced in ARMv6T2
Includes: ldc, ldcl, stc, stcl, mcr, mrc, mcrr, mrrc, cdp, ldc2,
ldc2l, stc2, stc2l, cdp2, mcr2, mrc2, mcrr2, mrrc2
Guarded by: ARM_EXT_V6T2
Tests: copro-thumb_v6t2plus-thumb_v*.d
For each of these groups, at least 2 tests are performed:
* instructions are not available in earlier architecture
* instructions are available in architecture where they were introduced
More tests need to be performed when instructions in a group span
several assembly files.
Note that an instruction in the original coprocessor testcase is
changed to unified syntax to allow the testcase to be assembled for ARM
and Thumb state. Correct processing of legacy syntax is covered in other
testcases.
2017-11-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit.
* testsuite/gas/arm/copro.s: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while
changing it to unified syntax and ...
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ...
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ...
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This.
* testsuite/gas/arm/copro.d: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2
and ...
* testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5
and ...
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target
ARMv5TE and ...
* testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6.
* testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected
errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase.
2017-11-01 10:49:13 +01:00
|
|
|
|
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while
|
FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
Part 2 adds a relaxation pass, which actually implements the code compression scheme.
bfd * archures.c: Add bfd_mach_ft32b.
* cpu-ft32.c: Add arch_info_struct.
* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
DIFF32. (ft32_elf_relocate_section): Add clauses
for R_FT32_SC0, SC1, DIFF32. (ft32_reloc_shortable,
elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
elf32_ft32_adjust_reloc_if_spans_insn,
elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
ft32_elf_relax_section): New function.
* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas * config/tc-ft32.c (md_assemble): add relaxation reloc
BFD_RELOC_FT32_RELAX. (md_longopts): Add "norelax" and
"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
ft32_allow_local_subtract): New function.
* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
shortcodes.
include * elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
2017-11-01 16:33:24 +01:00
|
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|
changing it to unified syntax and
|
[ARM] Fix Coprocessor instructions availability
A few coprocessor instructions introduced in ARMv2 are currently
accepted by GAS when targeting ARMv1 due to a typo in the code. This
patch fixes the issue and introduce a more fine grained testing for
coprocessor instructions availability. Coprocessor instructions are
grouped as follows:
* ARM coprocessor instructions introduced in ARMv2
Includes: ldc, stc, mcr, mrc, cdp, ldcl, stcl
Guarded by: ARM_EXT_V2
Tests: copro-arm_v2plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5
Includes: ldc2, ldc2l, stc2, stc2l, cdp2, mcr2, mrc2
Guarded by: ARM_EXT_V5
Tests: copro-arm_v5plus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv5TE
Includes: mcrr, mrrc
Guarded by: ARM_EXT_V5E
Tests: copro-arm_v5teplus-arm_v*.d
* ARM coprocessor instructions introduced in ARMv6
Includes: mcrr2, mrrc2
Guarded by: ARM_EXT_V6
Tests: copro-arm_v6plus-arm_v*.d
* Thumb coprocessor instructions introduced in ARMv6T2
Includes: ldc, ldcl, stc, stcl, mcr, mrc, mcrr, mrrc, cdp, ldc2,
ldc2l, stc2, stc2l, cdp2, mcr2, mrc2, mcrr2, mrrc2
Guarded by: ARM_EXT_V6T2
Tests: copro-thumb_v6t2plus-thumb_v*.d
For each of these groups, at least 2 tests are performed:
* instructions are not available in earlier architecture
* instructions are available in architecture where they were introduced
More tests need to be performed when instructions in a group span
several assembly files.
Note that an instruction in the original coprocessor testcase is
changed to unified syntax to allow the testcase to be assembled for ARM
and Thumb state. Correct processing of legacy syntax is covered in other
testcases.
2017-11-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit.
* testsuite/gas/arm/copro.s: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while
changing it to unified syntax and ...
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ...
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ...
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This.
* testsuite/gas/arm/copro.d: Split into ...
* testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2
and ...
* testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5
and ...
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target
ARMv5TE and ...
* testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6.
* testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected
errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase.
* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l:
Expected errors for the above two testcases.
* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase.
2017-11-01 10:49:13 +01:00
|
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* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ...
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* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ...
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* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This.
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* testsuite/gas/arm/copro.d: Split into ...
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* testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2
|
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and ...
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* testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5
|
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and ...
|
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* testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target
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ARMv5TE and ...
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* testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6.
|
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* testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected
|
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|
errors for the above two testcases.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase.
|
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|
* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l:
|
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|
Expected errors for the above two testcases.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l:
|
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Expected errors for the above two testcases.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase.
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase.
|
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* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l:
|
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Expected errors for the above two testcases.
|
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* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase.
|
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2017-10-26 20:16:41 +02:00
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2017-10-26 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22352
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* config/tc-i386.c (check_VecOperands): Also check XMM register
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for invalid register in AVX512 gathers.
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* testsuite/gas/i386/vgather-check.s: Add tests for AVX512
|
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gathers with XMM register.
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* testsuite/gas/i386/x86-64-vgather-check.s: Likewise.
|
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* testsuite/gas/i386/vgather-check-error.l: Updated.
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* testsuite/gas/i386/vgather-check-none.d: Likewise.
|
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* testsuite/gas/i386/vgather-check-warn.d: Likewise.
|
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* testsuite/gas/i386/vgather-check-warn.e: Likewise.
|
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* testsuite/gas/i386/vgather-check.d: Likewise.
|
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* testsuite/gas/i386/x86-64-vgather-check-error.l: Likewise.
|
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* testsuite/gas/i386/x86-64-vgather-check-none.d: Likewise.
|
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* testsuite/gas/i386/x86-64-vgather-check-warn.d: Likewise.
|
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* testsuite/gas/i386/x86-64-vgather-check-warn.e: Likewise.
|
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* testsuite/gas/i386/x86-64-vgather-check.d: Likewise.
|
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2017-10-26 01:11:06 +02:00
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2017-10-26 Hans-Peter Nilsson <hp@bitrange.com>
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* testsuite/gas/all/fill-1.s: Use L2 rather than .L2.
|
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PR22348, conflicting global vars in crx and cr16
include/
PR 22348
* opcode/cr16.h (instruction): Delete.
(cr16_words, cr16_allWords, cr16_currInsn): Delete.
* opcode/crx.h (crx_cst4_map): Rename from cst4_map.
(crx_cst4_maps): Rename from cst4_maps.
(crx_no_op_insn): Rename from no_op_insn.
(instruction): Delete.
opcodes/
PR 22348
* cr16-dis.c (cr16_cinvs, instruction, cr16_currInsn): Make static.
(cr16_words, cr16_allWords, processing_argument_number): Likewise.
(imm4flag, size_changed): Likewise.
* crx-dis.c (crx_cinvs, NUMCINVS, instruction, currInsn): Likewise.
(words, allWords, processing_argument_number): Likewise.
(cst4flag, size_changed): Likewise.
* crx-opc.c (crx_cst4_map): Rename from cst4_map.
(crx_cst4_maps): Rename from cst4_maps.
(crx_no_op_insn): Rename from no_op_insn.
gas/
PR 22348
* config/tc-crx.c (instruction, output_opcode): Make static.
(relocatable, ins_parse, cur_arg_num): Likewise.
(parse_insn): Adjust for renamed opcodes globals.
(check_range): Likewise
2017-10-25 13:29:14 +02:00
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|
2017-10-25 Alan Modra <amodra@gmail.com>
|
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PR 22348
|
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* config/tc-crx.c (instruction, output_opcode): Make static.
|
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(relocatable, ins_parse, cur_arg_num): Likewise.
|
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(parse_insn): Adjust for renamed opcodes globals.
|
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(check_range): Likewise
|
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2017-10-25 07:01:58 +02:00
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|
2017-10-25 Alan Modra <amodra@gmail.com>
|
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* testsuite/gas/all/fill-1.d: Exclude tic4x and tic54x.
|
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* testsuite/gas/all/fill-1.s: Use L1 rather than .L1.
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2017-10-19 20:21:44 +02:00
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2017-10-24 Andrew Waterman <andrew@sifive.com>
|
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* testsuite/gas/riscv/c-addi16sp-fail.d: New test.
|
2017-10-25 07:01:58 +02:00
|
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* testsuite/gas/riscv/c-addi16sp-fail.l: Likewise.
|
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* testsuite/gas/riscv/c-addi16sp-fail.s: Likewise.
|
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* testsuite/gas/riscv/c-addi4spn-fail.d: Likewise.
|
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* testsuite/gas/riscv/c-addi4spn-fail.l: Likewise.
|
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* testsuite/gas/riscv/c-addi4spn-fail.s: Likewise.
|
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* testsuite/gas/riscv/riscv.exp: Add new tests.
|
2017-10-19 20:21:44 +02:00
|
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|
2017-09-24 03:04:16 +02:00
|
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|
2017-10-24 Andrew Waterman <andrew@sifive.com>
|
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* testsuite/gas/riscv/c-lui-fail.d: New testcase.
|
2017-10-25 07:01:58 +02:00
|
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* gas/testsuite/gas/riscv/c-lui-fail.l: Likewise.
|
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* gas/testsuite/gas/riscv/c-lui-fail.s: Likewise.
|
|
|
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|
* gas/testsuite/gas/riscv/riscv.exp: Likewise.
|
2017-09-24 03:04:16 +02:00
|
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|
2017-10-24 16:47:32 +02:00
|
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|
2017-10-24 H.J. Lu <hongjiu.lu@intel.com>
|
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* config/tc-i386.c (md_pseudo_table): Add .code64 directive
|
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only if BFD64 is defined.
|
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|
* testsuite/gas/i386/code64-inval.l: New file.
|
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|
|
|
* gas/testsuite/gas/i386/code64-inval.s: Likewise.
|
|
|
|
|
|
* gas/testsuite/gas/i386/code64.d: Likewise.
|
|
|
|
|
|
* gas/testsuite/gas/i386/code64.s: Likewise.
|
|
|
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|
|
* testsuite/gas/i386/i386.exp: Run mixed-mode-reloc32,
|
|
|
|
|
|
att-regs, intel-regs, intel-expr and string-ok tests only if
|
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|
|
assembler supports x86-64. Run code64 and code64-inval.
|
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2017-10-06 21:06:45 +02:00
|
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|
2017-10-23 Palmer Dabbelt <palmer@dabbelt.com>
|
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|
2017-10-24 15:58:48 +02:00
|
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|
* config/tc-riscv.c (riscv_frag_align_code): Align code by 4
|
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|
|
bytes on non-RVC systems.
|
2017-10-06 21:06:45 +02:00
|
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2017-10-23 16:39:46 +02:00
|
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2017-10-23 Maciej W. Rozycki <macro@imgtec.com>
|
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* config/tc-mips.c (mips_elf_final_processing): Don't set
|
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EF_MIPS_ABI2 in `e_flags'.
|
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2017-10-23 22:09:26 +02:00
|
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2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
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* config/tc-i386.c (cpu_arch): Add .avx512_bitalg.
|
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(cpu_noarch): noavx512_bitalg.
|
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|
* doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg.
|
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|
* testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests.
|
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|
|
* testsuite/gas/i386/avx512f_bitalg-intel.d: New test.
|
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|
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|
* testsuite/gas/i386/avx512f_bitalg.d: Likewise.
|
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|
* testsuite/gas/i386/avx512f_bitalg.s: Likewise.
|
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|
* testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise.
|
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|
* testsuite/gas/i386/avx512vl_bitalg.d: Likewise.
|
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|
* testsuite/gas/i386/avx512vl_bitalg.s: Likewise.
|
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|
|
* testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise.
|
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* testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise.
|
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|
* testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise.
|
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|
* testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise.
|
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* testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise.
|
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* testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise.
|
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2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* config/tc-i386.c (cpu_arch): Add .avx512_vnni.
|
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(cpu_noarch): Add noavx512_vnni.
|
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* doc/c-i386.texi: Document .avx512_vnni.
|
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|
* testsuite/gas/i386/i386.exp: Add AVX512_VNNI tests.
|
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|
* testsuite/gas/i386/avx512vnni-intel.d: New test.
|
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* testsuite/gas/i386/avx512vnni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vnni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vnni_vl-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vnni_vl.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vnni_vl.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni_vl.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vnni_vl.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add VPCLMULQDQ.
|
|
|
|
|
|
* doc/c-i386.texi: Document VPCLMULQDQ.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run VPCLMULQDQ tests.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vpclmulqdq-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vpclmulqdq.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto.
|
|
|
|
|
|
|
|
|
|
|
|
2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add VAES.
|
|
|
|
|
|
* doc/c-i386.texi: Document VAES.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run VAES tests.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_vaes.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_vaes.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vaes-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/vaes.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vaes-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vaes.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vaes.s: Ditto.
|
|
|
|
|
|
|
|
|
|
|
|
2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .gfni.
|
|
|
|
|
|
* doc/c-i386.texi: Document .gfni.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Add GFNI tests.
|
|
|
|
|
|
* testsuite/gas/i386/avx.s: New GFNI test.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx.d: Adjust.
|
|
|
|
|
|
* testsuite/gas/i386/avx-intel.d: Likewise
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_gfni-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f_gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vl_gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512f_gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vl_gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx_gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx_gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx_gfni.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-gfni-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-gfni.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-gfni.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .avx512_vbmi2.
|
|
|
|
|
|
(cpu_noarch): noavx512_vbmi2.
|
|
|
|
|
|
* doc/c-i386.texi: Document .avx512_vbmi2, noavx512_vbmi2.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Add AVX512_VBMI2 tests.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2_vl-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2_vl.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/avx512vbmi2_vl.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2_vl-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2_vl.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512vbmi2_vl.s: Likewise.
|
|
|
|
|
|
|
2017-10-22 13:32:44 +02:00
|
|
|
|
2017-10-22 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/22304
|
|
|
|
|
|
* testsuite/gas/cris/range-err-1.s: Remove quotes left from last edit.
|
|
|
|
|
|
|
2017-10-20 12:45:19 +02:00
|
|
|
|
2017-10-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22324
|
|
|
|
|
|
* read.c (s_rept): Use size_t type for count parameter.
|
|
|
|
|
|
(do_repeat): Change type of count parameter to size_t.
|
|
|
|
|
|
Issue an error is the count parameter is negative.
|
|
|
|
|
|
(do_repeat_with_expression): Likewise.
|
|
|
|
|
|
* read.h: Update prototypes for do_repeat and
|
|
|
|
|
|
do_repeat_with_expression.
|
|
|
|
|
|
* doc/as.texinfo (Rept): Document that a zero count is allowed but
|
|
|
|
|
|
negative counts are not.
|
|
|
|
|
|
* config/tc-rx.c (rx_rept): Use size_t type for count parameter.
|
|
|
|
|
|
* config/tc-tic54x.c (tic54x_loop): Cast count parameter to size_t
|
|
|
|
|
|
type.
|
|
|
|
|
|
* testsuite/gas/macros/end.s: Add a test using a negative repeat
|
|
|
|
|
|
count.
|
|
|
|
|
|
* testsuite/gas/macros/end.l: Add expected error message.
|
|
|
|
|
|
|
2017-05-19 03:13:09 +02:00
|
|
|
|
2017-10-19 Palmer Dabbelt <palmer@dabbelt.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (md_apply_fix): Mark
|
|
|
|
|
|
BFD_RELOC_RISCV_PCREL_HI20 as relaxable when relaxations are
|
|
|
|
|
|
enabled.
|
|
|
|
|
|
|
2017-10-19 17:21:51 +02:00
|
|
|
|
2017-10-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21621
|
|
|
|
|
|
* config/tc-avr.h (struct avr_frag_data): Add prev_opcode field.
|
|
|
|
|
|
(TC_FRAG_INIT): Define.
|
|
|
|
|
|
(avr_frag_init): Add prototype.
|
|
|
|
|
|
* config/tc-avr.c (avr_frag_init): New function.
|
|
|
|
|
|
(avr_operands): Replace static local 'prev' variable with
|
|
|
|
|
|
prev_opcode field in current frag.
|
|
|
|
|
|
* testsuite/gas/avr/pr21621.s: New test source file.
|
|
|
|
|
|
* testsuite/gas/avr/pr21621.d: New test driver file.
|
|
|
|
|
|
* testsuite/gas/avr/pr21621.s: New test error output file.
|
|
|
|
|
|
|
2017-10-19 09:02:15 +02:00
|
|
|
|
2017-10-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/fill-1.s: Use normal labels. Change .text to
|
|
|
|
|
|
.data. Pick different values. Use .dc.w instead of .word.
|
|
|
|
|
|
* testsuite/gas/all/fill-1.d: New objdump output check.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Use run_dump_test to execute fill-1
|
|
|
|
|
|
testcase.
|
|
|
|
|
|
|
2017-10-17 19:51:38 +02:00
|
|
|
|
2017-10-18 Palmer Dabbelt <palmer@dabbelt.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/align.d: Mark as unsupported on RISC-V.
|
|
|
|
|
|
testsuite/gas/all/relax.d: Likewise.
|
|
|
|
|
|
testsuite/gas/all/sleb128-2.d: Likewise.
|
|
|
|
|
|
testsuite/gas/all/sleb128-4.d: Likewise.
|
|
|
|
|
|
testsuite/gas/all/sleb128-5.d: Likewise.
|
|
|
|
|
|
testsuite/gas/all/sleb128-7.d: Likewise.
|
|
|
|
|
|
testsuite/gas/elf/section11.d: Likewise.
|
|
|
|
|
|
testsuite/gas/all/gas.exp (diff1.s): Likewise.
|
|
|
|
|
|
|
2017-10-18 16:07:36 +02:00
|
|
|
|
2017-10-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/22304
|
|
|
|
|
|
* testsuite/gas/cris/range-err-1.s: Remove spurious xfails.
|
|
|
|
|
|
* testsuite/gas/cris/cris.exp: Expect the shexpr-1 test to pass.
|
|
|
|
|
|
|
2017-10-18 15:50:49 +02:00
|
|
|
|
2017-10-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
|
2017-10-17 05:45:55 +02:00
|
|
|
|
2017-10-16 Sandra Loosemore <sandra@codesourcery.com>
|
|
|
|
|
|
Henry Wong <henry@stuffedcow.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-nios2.c (nios2_translate_pseudo_insn): Check for
|
|
|
|
|
|
correct number of arguments.
|
|
|
|
|
|
(md_assemble): Handle failure of nios2_translate_pseudo_insn.
|
|
|
|
|
|
* testsuite/gas/nios2/illegal_pseudoinst.l: New file.
|
|
|
|
|
|
* testsuite/gas/nios2/illegal_pseudoinst.s: New file.
|
|
|
|
|
|
* testsuite/gas/nios2/nios2.exp: Add illegal_pseudoinst test.
|
|
|
|
|
|
|
2017-10-13 03:37:40 +02:00
|
|
|
|
2017-10-12 James Bowman <james.bowman@ftdichip.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
|
|
|
|
|
|
K15.
|
|
|
|
|
|
(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.
|
|
|
|
|
|
|
2017-10-11 17:48:16 +02:00
|
|
|
|
2017-10-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21977
|
|
|
|
|
|
* listing.c (listing_newline): Use the name of the current
|
|
|
|
|
|
physical input file, rather than the current logical input file,
|
|
|
|
|
|
unless including high level source in the listing.
|
|
|
|
|
|
* input-scrub.c (as_where_physical): New function. Returns the
|
|
|
|
|
|
name of the current physical input file.
|
|
|
|
|
|
* as.h: Add prototype for as_where_physical.
|
|
|
|
|
|
|
2017-10-09 18:37:53 +02:00
|
|
|
|
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/s390/zarch-arch12.d (prno, tpei, irbm): New
|
|
|
|
|
|
instructions added.
|
|
|
|
|
|
* testsuite/gas/s390/zarch-arch12.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/s390/zarch-z13.d: Rename ppno to prno.
|
|
|
|
|
|
|
2017-10-09 15:40:15 +02:00
|
|
|
|
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/fill-1.s: Replace nop with .word 42
|
|
|
|
|
|
|
|
|
|
|
|
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (s_fill): Invoke expression instead of
|
|
|
|
|
|
get_known_segmented_expression.
|
|
|
|
|
|
* testsuite/gas/all/fill-1.s: New testcase.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run fill-1 testcase
|
|
|
|
|
|
|
2017-10-05 17:17:22 +02:00
|
|
|
|
2017-10-05 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22133
|
|
|
|
|
|
* config/tc-msp430.c (parse_exp): Skip an 'h' suffix to constant
|
|
|
|
|
|
expressions.
|
|
|
|
|
|
(msp430_srcoperand): Check that the entire text was parsed by
|
|
|
|
|
|
parse_exp.
|
|
|
|
|
|
(msp430_operands): Likewise.
|
|
|
|
|
|
* testsuite/gas/msp430/pr22133.s: New test file.
|
|
|
|
|
|
* testsuite/gas/msp430/pr22133.d: New test driver.
|
|
|
|
|
|
* testsuite/gas/msp430/pr22133.s: Expected error output.
|
|
|
|
|
|
* testsuite/gas/msp430/msp430.exp: Run the new test.
|
|
|
|
|
|
|
2017-10-05 03:01:47 +02:00
|
|
|
|
2017-10-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21167
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run group3.
|
|
|
|
|
|
* testsuite/gas/elf/group3.d: New file.
|
|
|
|
|
|
* testsuite/gas/elf/group3.s: Likewise.
|
|
|
|
|
|
|
PR21167, relocation sections not included in groups
This fixes a wart I've known about for years, but haven't done
anything about because BFD treats relocation sections as an adjunct to
the section they relocate. SHF_GROUP on the section thus implicitly
applies to its relocation section(s), but it is an error that the
reloc sections aren't part of the group.
Like many patches to gas, this wasn't as straightforward as it could
be due to a number of backends, i386, cr16 and others, removing relocs
in tc_get_reloc rather than marking them as "done" earlier in
md_apply_reloc. So it isn't possible for the group support to
reliably detect the presence of relocs by looking at fixups earlier
than write_relocs. However the group support needs to create
signature symbols, and that must be done before the symbol table is
frozen, before write_relocs. So split off the group sizing from
elf_adjust_symtab and put it in elf_frob_file_after_relocs.
bfd/
PR 21167
* elf.c (_bfd_elf_setup_sections): Don't trim reloc sections from
groups.
(_bfd_elf_init_reloc_shdr): Pass sec_hdr, use it to copy SHF_GROUP
flag from section.
(elf_fake_sections): Adjust calls. Exit immediately on failure.
(bfd_elf_set_group_contents): Add associated reloc section indices
to group contents
gas/
PR 21167
* config/obj-elf.c (struct group_list): Delete elt_count.
(groups): New static.
(build_group_lists): Don't count elements.
(elf_adjust_symtab): Use groups rather than auto list. Set up
pointer from group member to SHT_GROUP section. Don't size
SHT_GROUP section or clean up here..
(elf_frob_file_after_relocs): ..do so here instead.
* testsuite/gas/arc/jli-1.d,
* testsuite/gas/elf/groupautob.d,
* testsuite/gas/mips/compact-eh-eb-2.d,
* testsuite/gas/mips/compact-eh-eb-5.d,
* testsuite/gas/mips/compact-eh-el-2.d,
* testsuite/gas/mips/compact-eh-el-5.d: Adjust.
ld/
PR 21167
* testsuite/ld-elf/group9b.d: Adjust for relocs included in group.
2017-10-04 01:23:53 +02:00
|
|
|
|
2017-10-05 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21167
|
|
|
|
|
|
* config/obj-elf.c (struct group_list): Delete elt_count.
|
|
|
|
|
|
(groups): New static.
|
|
|
|
|
|
(build_group_lists): Don't count elements.
|
|
|
|
|
|
(elf_adjust_symtab): Use "groups" rather than auto "list". Set up
|
|
|
|
|
|
pointer from group member to SHT_GROUP section. Don't size
|
|
|
|
|
|
SHT_GROUP section or clean up here..
|
|
|
|
|
|
(elf_frob_file_after_relocs): ..do so here instead.
|
|
|
|
|
|
* testsuite/gas/arc/jli-1.d,
|
|
|
|
|
|
* testsuite/gas/elf/groupautob.d,
|
|
|
|
|
|
* testsuite/gas/mips/compact-eh-eb-2.d,
|
|
|
|
|
|
* testsuite/gas/mips/compact-eh-eb-5.d,
|
|
|
|
|
|
* testsuite/gas/mips/compact-eh-el-2.d,
|
|
|
|
|
|
* testsuite/gas/mips/compact-eh-el-5.d: Adjust.
|
|
|
|
|
|
|
2017-09-30 11:31:37 +02:00
|
|
|
|
2017-10-01 Alexander Fedotov <alfedotov@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/vle-mult-ld-st-insns.s: New file: Tests the
|
|
|
|
|
|
support for the VLE multiple load/store instructions.
|
|
|
|
|
|
* testsuite/gas/ppc/vle-mult-ld-st-insns.d: New file: Test
|
|
|
|
|
|
driver.
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run it.
|
|
|
|
|
|
|
2017-09-27 17:21:36 +02:00
|
|
|
|
2017-09-27 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22179
|
|
|
|
|
|
* testsuite/gas/riscv/fmv.x.s: New file: Tests the support for the
|
|
|
|
|
|
renamed fmv.x.s and fmv.s.x instructions.
|
|
|
|
|
|
* testsuite/gas/riscv/fmv.x.d: New file: Test driver.
|
|
|
|
|
|
|
2017-09-22 01:54:19 +02:00
|
|
|
|
2017-09-21 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/elf_mach_5900.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run it.
|
|
|
|
|
|
|
2017-09-22 01:54:19 +02:00
|
|
|
|
2017-09-21 James Cowgill <James.Cowgill@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21762
|
|
|
|
|
|
* config/tc-mips.c (s_mips_stab): Insert call to
|
|
|
|
|
|
file_mips_check_options.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@stabs-symbol-type.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@stabs-symbol-type.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/stabs-symbol-type.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/stabs-symbol-type.s: New test source.
|
|
|
|
|
|
|
2017-09-21 02:24:04 +02:00
|
|
|
|
2017-09-21 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.h (EH_FRAME_ALIGNMENT): Define.
|
|
|
|
|
|
|
2017-09-14 02:49:31 +02:00
|
|
|
|
2017-09-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22127
|
|
|
|
|
|
* write.c (resolve_reloc_expr_symbols): Don't segfault when
|
|
|
|
|
|
sec has been set to NULL.
|
|
|
|
|
|
|
2017-09-09 14:31:30 +02:00
|
|
|
|
2017-09-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (NOTRACK_PREFIX): Removed.
|
|
|
|
|
|
(REX_PREFIX): Updated.
|
|
|
|
|
|
(MAX_PREFIXES): Likewise.
|
|
|
|
|
|
(parse_insn): Remove restriction on NOTRACK prefix position.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.s: Add tests with NOTRACK prefix
|
|
|
|
|
|
before other prefixes.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.s: Remove tests with NOTRACK
|
|
|
|
|
|
prefix before other prefixes.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrack-intel.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
|
|
|
|
|
|
|
RISC-V: Avoid emitting invalid instructions in mixed RVC/no-RVC code
When linking the following code
.global _prog_start
_prog_start:
mv x1, x1
mv x2, x2
.align 2
rvc_boundry:
.option norvc
.align 3
mv x3, x3
we currently emit an invalid two-byte 0 instruction. The actual output
code looks like
0000000080000000 <_prog_start>:
80000000: 8086 mv ra,ra
80000002: 810a mv sp,sp
0000000080000004 <rvc_boundry>:
80000004: 0000 unimp
80000006: 0001 nop
80000008: 00018193 mv gp,gp
This ends up manifesting due to the two-byte compressed NOP that's
pessimisticly emitted by the ".align 2", which results in "rvc_boundry"
being 2-byte aligned. frag_align_code() then goes and outputs a 2-byte
NOP (which is invalid in no-RVC mode) to align the code back to a 4-byte
boundry, which can't be relaxed away by the linker as it's not part of
the R_RISCV_RELAX relocation.
The fix is to just always emit the worst case possible alignment into
the output as a single R_RISCV_RELAX, which the linker will then fix up.
With this patch I get the expected code generation
0000000080000000 <_prog_start>:
80000000: 8086 mv ra,ra
80000002: 810a mv sp,sp
0000000080000004 <rvc_boundry>:
80000004: 00000013 nop
80000008: 00018193 mv gp,gp
gas/ChangeLog
2017-09-07 Palmer Dabbelt <palmer@dabbelt.com>
* config/tc-riscv.c (riscv_frag_align_code): Emit the entire
alignment sequence inside R_RISCV_ALIGN.
2017-06-16 23:33:16 +02:00
|
|
|
|
2017-09-07 Palmer Dabbelt <palmer@dabbelt.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_frag_align_code): Emit the entire
|
|
|
|
|
|
alignment sequence inside R_RISCV_ALIGN.
|
|
|
|
|
|
|
2017-09-05 00:52:17 +02:00
|
|
|
|
2017-09-05 Alexander Fedotov <alexander.fedotov@nxp.com>
|
|
|
|
|
|
Edmar Wienskoski <edmar.wienskoski@nxp.com
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_parse_option): Handle "mno-vle" flag.
|
|
|
|
|
|
(ppc_elf_section_letter): New function.
|
|
|
|
|
|
* config/tc-ppc.h (md_elf_section_letter): New.
|
|
|
|
|
|
* testsuite/gas/elf/section10.d: Adjust for VLE.
|
|
|
|
|
|
|
2017-09-01 12:43:51 +02:00
|
|
|
|
2017-09-01 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_cpus): Enable DOTPROD for
|
|
|
|
|
|
cortex-a55 and cortx-a75.
|
|
|
|
|
|
|
2017-08-30 17:03:31 +02:00
|
|
|
|
2017-08-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/branch-addend-micromips.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-addend-micromips-n32.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-addend-micromips-n64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-addend-micromips.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-08-30 16:54:19 +02:00
|
|
|
|
2017-08-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Respect
|
|
|
|
|
|
`mips_ignore_branch_isa'.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n32-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n64-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n32-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n64-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-5.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-6.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-6.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-7.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-08-30 13:20:53 +02:00
|
|
|
|
2017-08-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-2.d: Use `branch-local-2.l'
|
|
|
|
|
|
for `error-output'.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-3.d: Use `branch-local-3.l'
|
|
|
|
|
|
for `error-output'.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-2.l: Remove file.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-2.l: Remove file.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-3.l: Remove file.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-3.l: Remove file.
|
|
|
|
|
|
|
2017-08-29 18:18:43 +02:00
|
|
|
|
2017-08-29 Jozef Lawrynowicz <jozef.l@somniumtech.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-msp430.c (md_parse_option): Define high data and high
|
|
|
|
|
|
bss symbols if -mdata-region is passed.
|
|
|
|
|
|
Define -mdata-region open.
|
|
|
|
|
|
* doc/c-msp430.texi: Document -mdata-region.
|
|
|
|
|
|
* testsuite/gas/msp430/high-data-bss-sym.d: New test.
|
|
|
|
|
|
* testsuite/gas/msp430/high-data-bss-sym.s: New.
|
|
|
|
|
|
* testsuite/gas/msp430/msp430.exp: Add -mdata-region tests.
|
|
|
|
|
|
|
2017-08-23 17:08:46 +02:00
|
|
|
|
2017-08-23 Alexander Fedotov <alexander.fedotov@nxp.com>
|
|
|
|
|
|
Edmar Wienskoski <edmar.wienskoski@nxp.com
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c:
|
|
|
|
|
|
(md_parse_option): Add mspe2 switch.
|
|
|
|
|
|
(md_show_usage): Document -mspe2.
|
|
|
|
|
|
(ppc_setup_opcodes): Handle spe2_opcodes.
|
|
|
|
|
|
* doc/as.texinfo: Document -mspe2.
|
|
|
|
|
|
* doc/c-ppc.texi: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/efs.d: New file.
|
|
|
|
|
|
* testsuite/gas/ppc/efs.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/efs2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/efs2.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run new tests.
|
|
|
|
|
|
* testsuite/gas/ppc/spe.d: New file.
|
|
|
|
|
|
* testsuite/gas/ppc/spe.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe2-checks.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe2-checks.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe2-checks.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe2.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe_ambiguous.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/spe_ambiguous.s: Likewise.
|
|
|
|
|
|
|
2017-08-23 14:46:45 +02:00
|
|
|
|
2017-08-23 James Clarke <jrtc27@jrtc27.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (tc_gen_reloc): Convert BFD_RELOC_8/16/32/64
|
|
|
|
|
|
into the corresponding BFD_RELOC_8/16/32/64_PCREL relocation
|
|
|
|
|
|
when requested.
|
|
|
|
|
|
* config/tc-sparc.h (DIFF_EXPR_OK): Define to enable PC-relative
|
|
|
|
|
|
diff relocations.
|
|
|
|
|
|
(TC_FORCE_RELOCATION_SUB_LOCAL): Define to ensure only supported
|
|
|
|
|
|
relocations are made PC-relative.
|
|
|
|
|
|
(CFI_DIFF_EXPR_OK): Define to 0 to force BFD_RELOC_32_PCREL to
|
|
|
|
|
|
be used directly, since otherwise BFD_RELOC_SPARC_UA32 will be
|
|
|
|
|
|
used for .eh_frame which cannot in general be converted to a
|
|
|
|
|
|
BFD_RELOC_32_PCREL due to alignment requirements.
|
|
|
|
|
|
|
2017-08-22 15:00:18 +02:00
|
|
|
|
2017-08-22 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/lsp-checks.d: Assemble with -a32.
|
|
|
|
|
|
* testsuite/gas/ppc/lsp.d: Likewise.
|
|
|
|
|
|
|
2017-08-21 14:45:59 +02:00
|
|
|
|
2017-08-21 Alexander Fedotov <alexander.fedotov@nxp.com>
|
|
|
|
|
|
Edmar Wienskoski <edmar.wienskoski@nxp.com
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/lsp-checks.d,
|
|
|
|
|
|
* testsuite/gas/ppc/lsp-checks.l,
|
|
|
|
|
|
* testsuite/gas/ppc/lsp-checks.s: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/lsp.d,
|
|
|
|
|
|
* testsuite/gas/ppc/lsp.s: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run new tests.
|
|
|
|
|
|
|
2017-08-15 14:58:01 +02:00
|
|
|
|
2017-08-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (REGDEF_ALIAS): Define
|
|
|
|
|
|
(reg_names): Update for ip0, ip1, fp, lr to use REGDEF_ALIAS
|
|
|
|
|
|
* doc/c-aarch64.texi: Update documentation on .req.
|
|
|
|
|
|
* testsuite/gas/diagnostic.s: Update
|
|
|
|
|
|
* testsuite/gas/diagnostic.l: Likewise
|
|
|
|
|
|
* testsuite/gas/register_aliases.s: New file.
|
|
|
|
|
|
* testsuite/gas/register_aliases.d: New file.
|
|
|
|
|
|
|
2017-08-11 16:41:51 +02:00
|
|
|
|
2017-08-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21667
|
|
|
|
|
|
* read.c (pseudo_set): Update error message for alias of common
|
|
|
|
|
|
symbol.
|
|
|
|
|
|
* write.c (write_object_file): Disallow both local and global
|
|
|
|
|
|
aliases of common symbol.
|
|
|
|
|
|
* testsuite/gas/elf/common5a.d: New file.
|
|
|
|
|
|
* testsuite/gas/elf/common5a.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5a.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5b.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5b.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5b.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5c.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5c.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5d.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/common5d.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run common5a, common5b, common5c
|
|
|
|
|
|
and common5d.
|
|
|
|
|
|
|
2017-08-10 12:51:42 +02:00
|
|
|
|
2017-08-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21939
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_set_indirect_symbols): Increase
|
|
|
|
|
|
size of indirect_syms array so that it is large enough to hold
|
|
|
|
|
|
every symbol if necessary.
|
|
|
|
|
|
|
2017-08-09 18:52:54 +02:00
|
|
|
|
2017-08-09 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_crc32_1): Remove warning on REG_SP for thumb_mode.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-a-bad.d: Update exepcted result.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-a.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-r.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-ar-bad.s: Update test case.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-ar.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-bad.l: Update expected error message.
|
|
|
|
|
|
|
2017-08-02 11:19:22 +02:00
|
|
|
|
2017-08-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Add am33 to the skip lists of tests
|
|
|
|
|
|
passed over by the mn10300 target.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-11.d: Correct skip of am33 target.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-12.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-13.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-14.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-15.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-16.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-17.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-18.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-7.d: Likewise.
|
|
|
|
|
|
|
2017-08-01 14:53:27 +02:00
|
|
|
|
2017-08-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21874
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_operand): Update segment
|
|
|
|
|
|
register check.
|
|
|
|
|
|
* testsuite/gas/i386/intelok.s: Replace "fs:gs:[eax]" with
|
|
|
|
|
|
"fs:[eax]".
|
|
|
|
|
|
* testsuite/gas/i386/inval-seg.s: Add tests for invalid segment
|
|
|
|
|
|
register.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-inval-seg.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/inval-seg.l: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-inval-seg.l: Likewise.
|
|
|
|
|
|
|
2017-07-31 18:51:25 +02:00
|
|
|
|
2017-07-31 John David Anglin <danglin@gcc.gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-hppa.c (pa_ip): Clear `d' bit in branch on bit instructions
|
|
|
|
|
|
with a double-word condition and a fixed bit position greater than 31.
|
|
|
|
|
|
|
2017-07-28 11:02:57 +02:00
|
|
|
|
2017-07-28 Andrew Waterman <andrew@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_set_arch): Handle the Q subset like
|
|
|
|
|
|
all other subsets.
|
|
|
|
|
|
Obviate use-after-free.
|
|
|
|
|
|
|
2017-07-25 13:12:16 +02:00
|
|
|
|
2017-07-25 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21739
|
|
|
|
|
|
* testsuite/gas/arc/add_s-err.s: Update expected error message.
|
|
|
|
|
|
|
2017-07-24 12:32:57 +02:00
|
|
|
|
2017-07-24 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21809
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_init_frag): Do not set a mapping
|
|
|
|
|
|
state for frags in debug sections.
|
|
|
|
|
|
* config/tc-arm.c (arm_init_frag): Likewise.
|
|
|
|
|
|
|
2017-07-24 00:53:34 +02:00
|
|
|
|
2017-07-24 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2dbg_final_check): Rename local variable exp
|
|
|
|
|
|
from expr.
|
|
|
|
|
|
|
2017-07-21 10:54:06 +02:00
|
|
|
|
2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (s390_parse_cpu): Add z14 as alternate CPU
|
|
|
|
|
|
name.
|
|
|
|
|
|
* doc/as.texinfo: Add z14 to CPU string list.
|
|
|
|
|
|
* doc/c-s390.texi: Likewise.
|
|
|
|
|
|
|
2017-07-21 11:09:06 +02:00
|
|
|
|
2017-07-21 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (unused): Check offset of next in struct line_entry.
|
|
|
|
|
|
(current): Initialize view.
|
|
|
|
|
|
(force_reset_view, view_assert_failed): New variables.
|
|
|
|
|
|
(reverse_line_entry_list): New function.
|
|
|
|
|
|
(set_or_check_view): Likewise.
|
|
|
|
|
|
(dwarf2_gen_line_info_1): Call it.
|
|
|
|
|
|
(dwarf2_where): Set view to NULL.
|
|
|
|
|
|
(dwarf2_emit_insn): Return early when called before first file.
|
|
|
|
|
|
(dwarf2_directive_loc): Add view support. Emit insn
|
|
|
|
|
|
immediately when view option is given.
|
|
|
|
|
|
(process_entries): Avoid set_address to reset view when a known
|
|
|
|
|
|
address change already implies the view reset.
|
|
|
|
|
|
(dwarf2dbg_final_check): New function.
|
|
|
|
|
|
* dwarf2dbg.h (struct dwarf2_line_info): Add view.
|
|
|
|
|
|
(dwarf2dbg_final_check): Declare.
|
|
|
|
|
|
* read.c (s_leb128): Parse expression as deferred.
|
|
|
|
|
|
* write.c (write_object_file): Check pending view asserts.
|
|
|
|
|
|
(cvt_frag_to_fill): Complain about undefined leb128 operand.
|
|
|
|
|
|
* doc/as.texinfo (.loc): Document view support.
|
|
|
|
|
|
* NEWS: Mention the new feature.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run sleb128-9.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-9.d: New.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-9.l: New.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-9.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-1.d: Add nonzero views.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-5.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-5.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-6.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-6.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-7.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-7.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-8.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-8.l: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-8.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-9.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-9.l: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-9.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-10.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-10.l: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-10.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-11.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-11.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-12.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-12.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-13.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-13.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-14.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-14.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-15.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-15.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-16.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-16.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-17.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-17.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-18.d: New.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-18.s: New.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run dwarf2-5..18 tests.
|
|
|
|
|
|
* testsuite/gas/i386/dw2-compress-1.d: Add nonzero views.
|
|
|
|
|
|
* testsuite/gas/i386/dw2-compressed-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/lns/lns-big-delta.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/lns/lns-duplicate.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/loc-swap-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/loc-swap-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/loc-swap.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@loc-swap-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@loc-swap-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@loc-swap.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e@loc-swap.d: Likewise.
|
|
|
|
|
|
|
2017-07-19 09:56:55 +02:00
|
|
|
|
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arc/jli-1.d: New file.
|
|
|
|
|
|
* testsuite/gas/arc/jli-1.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/taux.d: Update for jli_base.
|
|
|
|
|
|
|
2017-07-19 09:55:12 +02:00
|
|
|
|
2017-07-19 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c (start_sbrk): Remove.
|
|
|
|
|
|
(main): Remove assignment.
|
|
|
|
|
|
(dump_statistics): Remove display of data size.
|
|
|
|
|
|
|
2017-07-19 08:05:30 +02:00
|
|
|
|
2017-07-19 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/pe/seh-x64-err-2.s: New test.
|
|
|
|
|
|
* testsuite/gas/pe/seh-x64-err-2.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/pe/pe.exp: Add test.
|
|
|
|
|
|
* config/obj-coff-seh.c (obj_coff_seh_do_final): Don't try to end
|
|
|
|
|
|
seh part.
|
|
|
|
|
|
|
2017-07-18 17:58:14 +02:00
|
|
|
|
2017-07-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21775
|
|
|
|
|
|
* config/tc-arm.c: Fix spelling typos.
|
|
|
|
|
|
* config/tc-mips.c: Likewise.
|
|
|
|
|
|
* config/tc-msp430.c: Likewise.
|
|
|
|
|
|
* config/tc-sh64.c: Likewise.
|
|
|
|
|
|
* config/tc-tic4x.c: Likewise.
|
|
|
|
|
|
* ecoff.c: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/ldr-bad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/ldr-t-bad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/tic54x/opcodes.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/msp340/errata_warns.l: Likewise.
|
|
|
|
|
|
|
2017-07-18 13:18:01 +02:00
|
|
|
|
2017-07-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/uk.po: Updated Ukranian translation.
|
|
|
|
|
|
|
Update assembler documentation on some AVR cores.
PR 21472
* config/tc-avr.c (mcu_types): Add entries for: attiny212,
attiny214, attiny412, attiny414, attiny814, attiny1614,
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
(md_show_usage): Adjust doc for "avrxmega3".
* doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3.
Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416,
attiny417, attiny814, attiny816, attiny817, attiny1614,
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
2017-07-17 11:23:10 +02:00
|
|
|
|
2017-07-17 Georg-Johann Lay <avr@gjlay.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21472
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add entries for: attiny212,
|
|
|
|
|
|
attiny214, attiny412, attiny414, attiny814, attiny1614,
|
|
|
|
|
|
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
|
|
|
|
|
|
(md_show_usage): Adjust doc for "avrxmega3".
|
|
|
|
|
|
* doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3.
|
|
|
|
|
|
Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416,
|
|
|
|
|
|
attiny417, attiny814, attiny816, attiny817, attiny1614,
|
|
|
|
|
|
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
|
|
|
|
|
|
|
2017-07-13 23:40:22 +02:00
|
|
|
|
2017-07-13 Jim Wilson <jim.wilson@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arch64.c (aarch64_cpus): Add AARCH64_FEATURE_RDMA to
|
|
|
|
|
|
falkor and qdf24xx entries.
|
|
|
|
|
|
|
2017-07-12 14:49:58 +02:00
|
|
|
|
2017-07-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/es.po: Update from translationproject.org/latest/gas/.
|
|
|
|
|
|
* po/fi.po: Likewise.
|
|
|
|
|
|
* po/fr.po: Likewise.
|
|
|
|
|
|
* po/id.po: Likewise.
|
|
|
|
|
|
* po/ja.po: Likewise.
|
|
|
|
|
|
* po/ru.po: Likewise.
|
|
|
|
|
|
* po/sv.po: Likewise.
|
|
|
|
|
|
* po/tr.po: Likewise.
|
|
|
|
|
|
* po/uk.po: Likewise.
|
|
|
|
|
|
* po/zh_CN.po: Likewise.
|
|
|
|
|
|
|
2017-07-12 13:17:02 +02:00
|
|
|
|
2017-07-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Fix compile time warnings using gcc 7.1.1.
|
|
|
|
|
|
* config/tc-pru.c (md_assemble): Add continue statement after
|
|
|
|
|
|
handling 'E' operand character.
|
|
|
|
|
|
* config/tc-v850.c (md_assemble): Initialise the 'insn' variable.
|
|
|
|
|
|
|
2017-07-05 13:04:37 +02:00
|
|
|
|
2017-07-05 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add Cortex-A55 and Cortex-A75.
|
|
|
|
|
|
* doc/c-arm.texi (-mcpu): Document Cortex-A55 and Cortex-A75.
|
|
|
|
|
|
|
2017-07-05 11:27:49 +02:00
|
|
|
|
2017-07-05 Borislav Petkov <bp@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/opcode.s: Add tests for ModRM.reg == 6 variants.
|
|
|
|
|
|
* testsuite/gas/i386/opcode.d: ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-opcode.s: Add x86_64 variants too.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-opcode.d: ditto.
|
|
|
|
|
|
|
2017-07-05 11:21:07 +02:00
|
|
|
|
2017-07-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_regs): Add MVFR2.
|
|
|
|
|
|
(do_vmrs): Constraint for MVFR2 and armv8.
|
|
|
|
|
|
(do_vmsr): Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a+fp.d: Update.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar+fp.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r+fp.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/vfp-bad.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/vfp-bad.l: Likewise.
|
|
|
|
|
|
|
2017-07-04 11:15:33 +02:00
|
|
|
|
2017-07-04 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2017-07-04 11:06:02 +02:00
|
|
|
|
2017-07-04 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Add marker for 2.29.
|
|
|
|
|
|
|
2017-07-03 14:25:21 +02:00
|
|
|
|
2017-07-03 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/symver.d: Don't run on hppa64-hpux.
|
|
|
|
|
|
|
2017-07-01 01:42:19 +02:00
|
|
|
|
2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Use a switch on the
|
|
|
|
|
|
microMIPS relaxation type rather than a chain of conditionals.
|
|
|
|
|
|
|
2017-07-01 01:42:19 +02:00
|
|
|
|
2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Rewrite `fix_new_exp'
|
|
|
|
|
|
calls in terms of `fix_new'.
|
|
|
|
|
|
|
2017-07-01 01:42:19 +02:00
|
|
|
|
2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Don't make a helper
|
|
|
|
|
|
expression symbol for `fix_new_exp' called with a non-zero
|
|
|
|
|
|
offset.
|
|
|
|
|
|
* testsuite/gas/mips/relax-offset.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@relax-offset.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@relax-offset.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@relax-offset.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@relax-offset.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/relax-offset.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/relax-offset.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
Add support for a __gcc_isr pseudo isntruction to the AVR assembler.
PR gas/21683
include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it.
(AVR Pseudo Instructions): New node.
* config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook.
(md_undefined_symbol): Define to avr_undefined_symbol.
(avr_pre_output_hook, avr_undefined_symbol): New protos.
* config/tc-avr.c (struc-symbol.h): Include it.
(ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums.
(avr_isr, avr_gccisr_opcode)
(avr_no_sreg_hash, avr_no_sreg): New static variables.
(avr_opt_s) <have_gccisr>: Add field.
(avr_opt): Add initializer for have_gccisr.
(enum options) <OPTION_HAVE_GCCISR>: Add enum.
(md_longopts) <"mgcc-isr">: Add entry.
(md_show_usage): Document -mgcc-isr.
(md_parse_option) [OPTION_HAVE_GCCISR]: Handle it.
(md_undefined_symbol): Remove.
(avr_undefined_symbol, avr_pre_output_hook): New fuctions.
(md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them.
(avr_operand) <pregno>: Add argument and set *pregno if function
is called for a register constraint.
[N]: Handle constraint.
(avr_operands) <avr_operand>: Pass 5th parameter to calls.
[avr_opt.have_gccisr]: Call avr_update_gccisr. Call
avr_gccisr_operands instead of avr_operands.
(avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag)
(avr_gccisr_operands, avr_check_gccisr_done): New static functions.
* testsuite/gas/avr/gccisr-01.d: New test.
* testsuite/gas/avr/gccisr-01.s: New test.
* testsuite/gas/avr/gccisr-02.d: New test.
* testsuite/gas/avr/gccisr-02.s: New test.
* testsuite/gas/avr/gccisr-03.d: New test.
* testsuite/gas/avr/gccisr-03.s: New test.
2017-06-30 17:37:39 +02:00
|
|
|
|
2017-06-30 Georg-Johann Lay <avr@gjlay.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21683
|
|
|
|
|
|
* doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it.
|
|
|
|
|
|
(AVR Pseudo Instructions): New node.
|
|
|
|
|
|
* config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook.
|
|
|
|
|
|
(md_undefined_symbol): Define to avr_undefined_symbol.
|
|
|
|
|
|
(avr_pre_output_hook, avr_undefined_symbol): New protos.
|
|
|
|
|
|
* config/tc-avr.c (struc-symbol.h): Include it.
|
|
|
|
|
|
(ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums.
|
|
|
|
|
|
(avr_isr, avr_gccisr_opcode)
|
|
|
|
|
|
(avr_no_sreg_hash, avr_no_sreg): New static variables.
|
|
|
|
|
|
(avr_opt_s) <have_gccisr>: Add field.
|
|
|
|
|
|
(avr_opt): Add initializer for have_gccisr.
|
|
|
|
|
|
(enum options) <OPTION_HAVE_GCCISR>: Add enum.
|
|
|
|
|
|
(md_longopts) <"mgcc-isr">: Add entry.
|
|
|
|
|
|
(md_show_usage): Document -mgcc-isr.
|
|
|
|
|
|
(md_parse_option) [OPTION_HAVE_GCCISR]: Handle it.
|
|
|
|
|
|
(md_undefined_symbol): Remove.
|
|
|
|
|
|
(avr_undefined_symbol, avr_pre_output_hook): New fuctions.
|
|
|
|
|
|
(md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them.
|
|
|
|
|
|
(avr_operand) <pregno>: Add argument and set *pregno if function
|
|
|
|
|
|
is called for a register constraint.
|
|
|
|
|
|
[N]: Handle constraint.
|
|
|
|
|
|
(avr_operands) <avr_operand>: Pass 5th parameter to calls.
|
|
|
|
|
|
[avr_opt.have_gccisr]: Call avr_update_gccisr. Call
|
|
|
|
|
|
avr_gccisr_operands instead of avr_operands.
|
|
|
|
|
|
(avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag)
|
|
|
|
|
|
(avr_gccisr_operands, avr_check_gccisr_done): New static functions.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-01.d: New test.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-01.s: New test.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-02.d: New test.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-02.s: New test.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-03.d: New test.
|
|
|
|
|
|
* testsuite/gas/avr/gccisr-03.s: New test.
|
|
|
|
|
|
|
2017-06-30 16:39:26 +02:00
|
|
|
|
2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_float_constant): Update description.
|
|
|
|
|
|
(match_operand): Likewise.
|
|
|
|
|
|
|
MIPS: Add microMIPS XPA support
Add support for the base and Virtualization ASE microMIPS instructions
as per the architecture specifications[1][2][3][4].
Most of this change by Andrew Bennett.
[1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", p. 340
[2] "microMIPS32 Architecture for Programmers Volume IV-i:
Virtualization Module of the microMIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00848, Revision 1.06,
December 10, 2013, Section 6.1 "Overview", pp. 133, 136
[3] "MIPS Architecture for Programmers Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 415, 444
[4] "microMIPS64 Architecture for Programmers Volume IV-i:
Virtualization Module of the microMIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00849, Revision 1.06,
December 10, 2013, Section 6.1 "Overview", pp. 134-135, 139-140
binutils/
* NEWS: Mention microMIPS XPA support.
opcodes/
* micromips-opc.c (XPA, XPAVZ): New macros.
(micromips_opcodes): Add "mfhc0", "mfhgc0", "mthc0" and
"mthgc0".
gas/
* config/tc-mips.c (mips_ases): Add microMIPS XPA support.
* testsuite/gas/mips/micromips@xpa.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test. Enable
`xpa-virt-err' test for `micromips'.
2017-06-30 08:21:56 +02:00
|
|
|
|
2017-06-30 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ases): Add microMIPS XPA support.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@xpa.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test. Enable
|
|
|
|
|
|
`xpa-virt-err' test for `micromips'.
|
|
|
|
|
|
|
MIPS: Add microMIPS R5 support
Add base microMIPS Release 5 ISA support and the ERETNC instruction in
particular, as per the architecture specifications[1][2].
Most of this change by Andrew Bennett.
References:
[1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 266-267
[2] "MIPS Architecture for Programmers Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 326-327
binutils/
* NEWS: Mention microMIPS Release 5 ISA support.
opcodes/
* micromips-opc.c (I36): New macro.
(micromips_opcodes): Add "eretnc".
gas/
* testsuite/gas/mips/micromips@r5.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
2017-06-30 08:21:56 +02:00
|
|
|
|
2017-06-30 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/micromips@r5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
|
2017-06-30 08:21:55 +02:00
|
|
|
|
2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
|
|
|
|
|
|
* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
|
|
|
|
|
|
flags. Add `-mvirt' to `as' flags.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-err.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-virt-err.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-err.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-err.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/xpa-virt-err.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-06-30 01:55:07 +02:00
|
|
|
|
2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
|
|
|
|
|
|
ASE_MIPS16E2_MT flag disassembler fix.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
|
2017-06-30 01:55:07 +02:00
|
|
|
|
2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
|
|
|
|
|
|
flag before recalculating.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
|
2017-06-28 12:09:01 +02:00
|
|
|
|
2017-06-28 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B.
|
|
|
|
|
|
(aarch64_features): Added dotprod.
|
|
|
|
|
|
* doc/c-aarch64.texi: Added dotprod.
|
|
|
|
|
|
* testsuite/gas/aarch64/dotproduct.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/dotproduct.s: New.
|
|
|
|
|
|
|
2017-06-28 12:00:55 +02:00
|
|
|
|
2017-06-28 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fpu_neon_ext_dotprod): New variable.
|
|
|
|
|
|
(neon_scalar_for_mul): Improve comments.
|
|
|
|
|
|
(do_neon_dotproduct): New function to encode Dot Product instructions.
|
|
|
|
|
|
(do_neon_dotproduct_s): Wrapper function for signed Dot Product
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
(do_neon_dotproduct_u): Wrapper function for unsigned Dot Product
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
(insns): New entries for vsdot and vudot.
|
|
|
|
|
|
(arm_extensions): New entry for "dotprod".
|
|
|
|
|
|
* doc/c-arm.texi: Document new "dotprod" extension.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod.s: New test source.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-illegal.s: New test source.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-thumb2.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-illegal.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-legacy-arch.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-illegal.l: New error file.
|
|
|
|
|
|
* testsuite/gas/arm/dotprod-legacy-arch.l: New error file.
|
|
|
|
|
|
|
2017-06-28 03:07:36 +02:00
|
|
|
|
2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/save-err.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@save.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips3@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips4@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips5@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips64@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r4000@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/sb1@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon2@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon3@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/xlr@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@save-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-copy.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-copy-err.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name'
|
|
|
|
|
|
option. Adjust for trailing padding change.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-copy-err.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/save-sub.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-copy.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-copy-err.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/save.s: Update description, change trailing
|
|
|
|
|
|
padding and remove trailing white space.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Expand `save' and `save-err'
|
|
|
|
|
|
tests across the regular MIPS interAptiv MR2 architecture. Run
|
|
|
|
|
|
the new tests.
|
|
|
|
|
|
|
2017-06-28 03:07:36 +02:00
|
|
|
|
2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp (interaptiv-mr2): New architecture.
|
|
|
|
|
|
(mips16e2-interaptiv-mr2): Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-asmacro.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@mcu.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@isa-override-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/attr-gnu-4-5.d: Ignore any number of ASE
|
|
|
|
|
|
flag lines present rather than just one.
|
|
|
|
|
|
* testsuite/gas/mips/attr-gnu-4-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/attr-gnu-4-7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/attr-none-o32-fp64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/attr-none-o32-fpxx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.l: New
|
|
|
|
|
|
stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.l:
|
|
|
|
|
|
New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.l:
|
|
|
|
|
|
New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l:
|
|
|
|
|
|
New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l:
|
|
|
|
|
|
New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.l: New
|
|
|
|
|
|
stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.l: New
|
|
|
|
|
|
stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.l:
|
|
|
|
|
|
New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@isa-override-1.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@isa-override-2.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
|
MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:
1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
MIPS16e2 instructions[1], for assembly and disassembly,
2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
regular MIPS instructions[2], for assembly and disassembly,
3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
extension.
4. Support for interAptiv MR2 architecture selection for assembly, in
the form of the `-march=interaptiv-mr2' command-line option and its
corresponding `arch=interaptiv-mr2' setting for the `.set' and
`.module' pseudo-ops.
5. Support for interAptiv MR2 architecture selection for disassembly,
in the form of the `mips:interaptiv-mr2' target architecture, for
use e.g. with the `-m' command-line option for `objdump'.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
Imagination Technologies Ltd., Document Number: MD00904, Revision
02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
Instructions", pp. 878-883
[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917
include/
* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
(AFL_EXT_INTERAPTIV_MR2): Likewise.
* opcode/mips.h: Document new operand codes defined.
(INSN_INTERAPTIV_MR2): New macro.
(INSN_CHIP_MASK): Adjust accordingly.
(CPU_INTERAPTIV_MR2): New macro.
(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
(MIPS16_ALL_ARGS): Rename to...
(MIPS_SVRS_ALL_ARGS): ... this.
(MIPS16_ALL_STATICS): Rename to...
(MIPS_SVRS_ALL_STATICS): ... this.
bfd/
* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
* cpu-mips.c (I_interaptiv_mr2): New enum value.
(arch_info_struct): Add "mips:interaptiv-mr2" entry.
* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
case.
(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
`bfd_mach_mips_interaptiv_mr2' entries.
* bfd-in2.h: Regenerate.
opcodes/
* mips-formats.h (INT_BIAS): New macro.
(INT_ADJ): Redefine in INT_BIAS terms.
* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
(mips_print_save_restore): New function.
(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
call.
(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
(print_mips16_insn_arg): Call `mips_print_save_restore' for
OP_SAVE_RESTORE_LIST handling, factored out from here.
* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
(mips_builtin_opcodes): Add "restore" and "save" entries.
* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
(IAMR2): New macro.
(mips16_opcodes): Add "copyw" and "ucopyw" entries.
binutils/
* readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
* NEWS: Mention Imagination interAptiv MR2 processor support.
gas/
* config/tc-mips.c (validate_mips_insn): Handle
OP_SAVE_RESTORE_LIST specially.
(mips_encode_save_restore, mips16_encode_save_restore): New
functions.
(match_save_restore_list_operand): Factor out SAVE/RESTORE
operand insertion into the instruction word or halfword to these
new functions.
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
`-march=' argument list.
2017-06-28 03:07:36 +02:00
|
|
|
|
2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
Matthew Fortune <matthew.fortune@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (validate_mips_insn): Handle
|
|
|
|
|
|
OP_SAVE_RESTORE_LIST specially.
|
|
|
|
|
|
(mips_encode_save_restore, mips16_encode_save_restore): New
|
|
|
|
|
|
functions.
|
|
|
|
|
|
(match_save_restore_list_operand): Factor out SAVE/RESTORE
|
|
|
|
|
|
operand insertion into the instruction word or halfword to these
|
|
|
|
|
|
new functions.
|
|
|
|
|
|
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
|
|
|
|
|
|
`-march=' argument list.
|
|
|
|
|
|
|
2017-06-27 05:23:54 +02:00
|
|
|
|
2017-06-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save.d: Rename to...
|
|
|
|
|
|
* testsuite/gas/mips/save.d: ... this.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.d: Update the
|
|
|
|
|
|
`error-output' option and rename to...
|
|
|
|
|
|
* testsuite/gas/mips/save-err.d: ... this.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.l: Rename to...
|
|
|
|
|
|
* testsuite/gas/mips/save-err.l: ... this.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save.s: Rename to...
|
|
|
|
|
|
* testsuite/gas/mips/save.s: ... this.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.s: Rename to...
|
|
|
|
|
|
* testsuite/gas/mips/save-err.s: ... this.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Rename `mips16e-save' and
|
|
|
|
|
|
`mips16e-save-err' invocations to `save' and `save-err'
|
|
|
|
|
|
respectively and reorder these tests away from MIPS16 tests.
|
|
|
|
|
|
|
2017-06-27 05:23:54 +02:00
|
|
|
|
2017-06-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save.d: Remove `-mmips:isa32
|
|
|
|
|
|
-mmips:16' from `objdump' flags and `-march=mips32 -mips16' from
|
|
|
|
|
|
`as' flags.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.d: Remove `-march=mips32'
|
|
|
|
|
|
from `as' flags.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save.s: Remove the `.set mips16'
|
|
|
|
|
|
pseudo-op.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run SAVE/RESTORE tests across all
|
|
|
|
|
|
MIPS16e architectures.
|
|
|
|
|
|
|
2017-06-27 05:23:54 +02:00
|
|
|
|
2017-06-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save-err.d: New test.
|
|
|
|
|
|
* gas/testsuite/gas/mips/mips.exp: Fold `mips16e-save-err' list
|
|
|
|
|
|
test into the new test.
|
|
|
|
|
|
|
2017-06-27 05:23:53 +02:00
|
|
|
|
2017-06-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-save.d: Capitalize the `name'
|
|
|
|
|
|
option.
|
|
|
|
|
|
|
2017-06-08 20:54:14 +02:00
|
|
|
|
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
|
|
|
|
|
|
R_RISCV_32_PCREL relocation.
|
|
|
|
|
|
|
2017-06-26 14:11:07 +02:00
|
|
|
|
2017-06-26 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21661
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_symver): Don't allow .symver with
|
|
|
|
|
|
common symbol.
|
|
|
|
|
|
(elf_frob_symbol): Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run pr21661.
|
|
|
|
|
|
* testsuite/gas/elf/pr21661.d: New file.
|
|
|
|
|
|
* testsuite/gas/elf/pr21661.s: Likewise.
|
|
|
|
|
|
|
2017-06-26 10:28:51 +02:00
|
|
|
|
2017-06-26 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fpu_any): Only define for ELF based targets.
|
|
|
|
|
|
|
2017-06-07 15:57:56 +02:00
|
|
|
|
2017-06-26 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known
|
|
|
|
|
|
instructions to be accounted as jumps.
|
|
|
|
|
|
(assemble_insn): Check for limms into the delay slots. Emit an
|
|
|
|
|
|
error if so.
|
|
|
|
|
|
* testsuite/gas/arc/asm-errors-3.d: New file.
|
|
|
|
|
|
* testsuite/gas/arc/asm-errors-3.err: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/asm-errors-3.s: Likewise.
|
|
|
|
|
|
|
2017-06-24 11:56:32 +02:00
|
|
|
|
2017-06-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention support of ARM Cortex-R52 processor.
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor.
|
|
|
|
|
|
* doc/c-arm.texi: Mention support for -mcpu=cortex-r52.
|
|
|
|
|
|
|
2017-06-24 11:37:47 +02:00
|
|
|
|
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention support for ARMv8-R architecture.
|
|
|
|
|
|
* config/tc-arm.c (arm_archs): Add entry for ARMv8-R.
|
|
|
|
|
|
(arm_extensions): Restrict pan, ras and rdma extension to
|
|
|
|
|
|
ARMv8-A and make crypto, fp and simd extensions available to
|
|
|
|
|
|
ARMv8-R.
|
|
|
|
|
|
(cpu_arch_ver): Add entry for ARMv8-R.
|
|
|
|
|
|
(aeabi_set_public_attributes): Update gas_assert for Tag_DIV_use
|
|
|
|
|
|
logic.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a+fp.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar+fp.s: This. Remove .arch directive.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a+fp.d: Specify source to assemble and
|
|
|
|
|
|
architecture to assemble for.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r+fp.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a+simd.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar+simd.s: This. Remove .arch directive.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a+simd.d: Specify source to assemble and
|
|
|
|
|
|
architecture to assemble for.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r+simd.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-bad.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-bad.s: This. Remove .arch directive.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-bad.l: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-bad.l: This. Decrement line number by 1.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-bad.d: Specify source to assemble,
|
|
|
|
|
|
architecture to assemble for and adjust error output file.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r-bad.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-barrier.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-barrier.s: This.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-barrier-arm.d: Adjust source.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r-barrier-arm.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r-barrier-thumb.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-it-bad.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-it-bad.s: This. Remove .arch directive.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-it-bad.l: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-it-bad.l: This. Decrement line number
|
|
|
|
|
|
by 1.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a-it-bad.d: Specify source to assemble,
|
|
|
|
|
|
architecture to assemble for and adjust error output file.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r-it-bad.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar.s: This. Remove .arch directive.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-a.d: Specify source to assemble and
|
|
|
|
|
|
architecture to assemble for.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-r.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv8-r+crypto.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv8-r+fp.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv8-r+simd.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv8-r.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/crc32.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-ar.s: This.
|
|
|
|
|
|
* testsuite/gas/arm/crc32.d: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-a.d: This. Specify source to assemble.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-r.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-bad.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-ar-bad.s: This.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-bad.d: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-a-bad.d: This. Specify source to
|
|
|
|
|
|
assemble.
|
|
|
|
|
|
* testsuite/gas/arm/crc32-armv8-r-bad.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/mask_1.s: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/mask_1-armv8-ar.s: This.
|
|
|
|
|
|
* testsuite/gas/arm/mask_1.d: Rename into ...
|
|
|
|
|
|
* testsuite/gas/arm/mask_1-armv8-a.d: This. Specify source to
|
|
|
|
|
|
assemble.
|
|
|
|
|
|
* testsuite/gas/arm/mask_1-armv8-r.d: new.
|
|
|
|
|
|
|
2017-06-24 11:26:41 +02:00
|
|
|
|
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_ext_v6m): Delete.
|
|
|
|
|
|
(arm_ext_v7m): Delete.
|
|
|
|
|
|
(arm_ext_m): Remove ARM_EXT_OS from the set of feature defined M
|
|
|
|
|
|
profile.
|
|
|
|
|
|
(arm_arch_v6m_only): Delete.
|
|
|
|
|
|
(do_t_swi): Remove special case for ARMv6S-M.
|
|
|
|
|
|
(md_assemble): Display error message previously in do_t_swi when
|
|
|
|
|
|
SVC is not available.
|
|
|
|
|
|
(insns): Guard swi and svc by arm_ext_os for Thumb mode.
|
|
|
|
|
|
(aeabi_set_public_attributes): Remove special case for ARMv6S-M.
|
|
|
|
|
|
|
2017-05-11 08:59:50 +02:00
|
|
|
|
2017-05-11 Andrew Waterman <andrew@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): Changes as_warn to as_bad for improper
|
|
|
|
|
|
shift amounts.
|
|
|
|
|
|
|
2017-06-22 10:34:12 +02:00
|
|
|
|
2017-06-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_ext_v7m): Add ATTRIBUTE_UNUSED.
|
|
|
|
|
|
|
2017-06-21 17:32:40 +02:00
|
|
|
|
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fpu_any): Defined from FPU_ANY.
|
|
|
|
|
|
(cpu_arch_ver): Add all architectures and sort by release date.
|
|
|
|
|
|
(have_ext_for_needed_feat_p): New.
|
|
|
|
|
|
(get_aeabi_cpu_arch_from_fset): New.
|
|
|
|
|
|
(aeabi_set_public_attributes): Call above function to determine
|
|
|
|
|
|
Tag_CPU_arch and Tag_CPU_arch_profile values. Adapt Tag_ARM_ISA_use
|
|
|
|
|
|
and Tag_THUMB_ISA_use selection logic to check absence of feature bit
|
|
|
|
|
|
accordingly.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv1.d: Fix expected Tag_CPU_arch build
|
|
|
|
|
|
attribute value.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv2a.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv2s.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/attr-march-armv3m.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/pr12198-2.d: Likewise.
|
|
|
|
|
|
|
2017-06-21 17:32:38 +02:00
|
|
|
|
2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/cet-intel.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/cet.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/cet.s: Update incsspd and setssbsy tests.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet.s: Likewise.
|
|
|
|
|
|
|
2017-06-21 17:30:01 +02:00
|
|
|
|
2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/cet-intel.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/cet.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/cet.s: Replace savessp with saveprevssp.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet.s: Likewise.
|
|
|
|
|
|
|
2017-06-21 17:28:30 +02:00
|
|
|
|
2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Update NOTRACK prefix check.
|
|
|
|
|
|
* testsuite/gas/i386/notrack-intel.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.s: Add NOTRACK prefix tests with
|
|
|
|
|
|
memory indirect branch.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.s: Remove memory indirect branch
|
|
|
|
|
|
with NOTRACK prefix.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
|
|
|
|
|
|
|
2017-06-21 16:06:51 +02:00
|
|
|
|
2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_extensions): New duplicate idiv entry to enable
|
|
|
|
|
|
Thumb division for ARMv7 architecture.
|
|
|
|
|
|
(arm_parse_extension): Document expected behavior for duplicate
|
|
|
|
|
|
entries.
|
|
|
|
|
|
(s_arm_arch_extension): Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/forbid-armv7-idiv-ext.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/forbid-armv7-idiv-ext.l: New expected output for
|
|
|
|
|
|
above test.
|
|
|
|
|
|
|
2017-06-21 15:57:53 +02:00
|
|
|
|
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (aeabi_set_public_attributes): Populate flags from
|
|
|
|
|
|
feature bits used or selected_cpu depending on whether a CPU was
|
|
|
|
|
|
selected by the user.
|
|
|
|
|
|
|
2017-06-21 15:09:38 +02:00
|
|
|
|
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (aeabi_set_public_attributes): Test *mcpu_ext_opt to
|
|
|
|
|
|
decide whether to set Tag_DSP_extension build attribute value. Remove
|
|
|
|
|
|
now useless arm_arch variable.
|
|
|
|
|
|
|
2017-06-21 15:08:08 +02:00
|
|
|
|
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (dyn_mcpu_ext_opt): New static variable.
|
|
|
|
|
|
(dyn_march_ext_opt): Likewise.
|
|
|
|
|
|
(md_begin): Copy extension feature bits alongside architecture ones.
|
|
|
|
|
|
Merge extensions feature bits in selected_cpu and cpu_variant if there
|
|
|
|
|
|
is some.
|
|
|
|
|
|
(arm_parse_extension): Pass architecture and extension feature bits in
|
|
|
|
|
|
separate parameters, with architecture bits being read only. Update
|
|
|
|
|
|
**opt_p directly rather than *ext_set and initialize it if needed.
|
|
|
|
|
|
(arm_parse_cpu): Stop merging architecture and extension feature bits
|
|
|
|
|
|
and instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
|
|
|
|
|
|
respectively. Adapt to change in parameters of arm_parse_extension.
|
|
|
|
|
|
(arm_parse_arch): Adapt to change in parameters of arm_parse_extension.
|
|
|
|
|
|
(aeabi_set_attribute_string): Make function static.
|
|
|
|
|
|
(arm_md_post_relax): New function.
|
|
|
|
|
|
(s_arm_cpu): Stop merging architecture and extension feature bits and
|
|
|
|
|
|
instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
|
|
|
|
|
|
respectively. Merge extension feature bits in cpu_variant
|
|
|
|
|
|
if there is any.
|
|
|
|
|
|
(s_arm_arch): Reset extension feature bit. Set selected_cpu from
|
|
|
|
|
|
*mcpu_cpu_opt and cpu_variant from selected_cpu and *mfpu_opt for
|
|
|
|
|
|
consistency with s_arm_cpu.
|
|
|
|
|
|
(s_arm_arch_extension): Update *dyn_mcpu_ext_opt rather than
|
|
|
|
|
|
selected_cpu, allocating it before hand if needed. Set selected_cpu
|
|
|
|
|
|
from it and then cpu_variant.
|
|
|
|
|
|
(s_arm_fpu): Merge *mcpu_ext_opt feature bits if any in cpu_variant.
|
|
|
|
|
|
* config/tc-arm.h (md_post_relax_hook): Set to arm_md_post_relax.
|
|
|
|
|
|
(aeabi_set_public_attributes): Delete external declaration.
|
|
|
|
|
|
(arm_md_post_relax): Declare externally.
|
|
|
|
|
|
|
2017-06-21 14:16:56 +02:00
|
|
|
|
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (struct arm_cpu_option_table): New ext field.
|
|
|
|
|
|
(ARM_CPU_OPT): Add parameter to set new ext field and reorder canonical
|
|
|
|
|
|
name field just after the name field.
|
|
|
|
|
|
(arm_cpus): Move extension feature bit from value field to ext field,
|
|
|
|
|
|
reorder parameter according to changes in ARM_CPU_OPT and reindent.
|
|
|
|
|
|
(arm_parse_cpu): Point mcpu_cpu_opt to a bitfield merging the value and
|
|
|
|
|
|
ext field from the selected arm_cpus entry.
|
|
|
|
|
|
(s_arm_cpu): Likewise.
|
|
|
|
|
|
|
2017-06-21 10:13:25 +02:00
|
|
|
|
2017-06-21 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_cpus): Add cortex-a55 and cortex-a75.
|
|
|
|
|
|
* doc/c-aarch64.texi (-mcpu): Document cortex-a55 and cortex-a75.
|
|
|
|
|
|
|
2017-06-15 17:21:48 +02:00
|
|
|
|
2017-06-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/21594
|
|
|
|
|
|
* testsuite/gas/i386/mpx.s: Add 2 tests with invalid bnd
|
|
|
|
|
|
register.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/mpx.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.d: Likewise.
|
|
|
|
|
|
|
2017-05-17 11:09:14 +02:00
|
|
|
|
2017-06-14 Max Filippov <jcmvbkbc@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (density_supported, xtensa_fetch_width,
|
|
|
|
|
|
absolute_literals_supported): Leave definitions uninitialized.
|
|
|
|
|
|
(directive_state): Leave entries for directive_density and
|
|
|
|
|
|
directive_absolute_literals initialized to false.
|
|
|
|
|
|
(xg_init_global_config, xtensa_init): New functions.
|
|
|
|
|
|
* config/tc-xtensa.h (TARGET_BYTES_BIG_ENDIAN): Define as 0.
|
|
|
|
|
|
(HOST_SPECIAL_INIT): New definition.
|
|
|
|
|
|
(xtensa_init): New declaration.
|
|
|
|
|
|
|
2017-06-07 14:34:34 +02:00
|
|
|
|
2017-06-07 Michael Collison <michael.collison@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (reg_entry_reg_names): Add IP0,
|
|
|
|
|
|
IP1, FP, and LR as register aliases of register 16, 17, 29
|
|
|
|
|
|
and 30 respectively.
|
|
|
|
|
|
* testsuite/gas/aarch64/diagnostic.l: Remove diagnostic
|
|
|
|
|
|
prohibiting register 'lr' which is now an alias.
|
|
|
|
|
|
* testsuite/gas/aarch64/diagnostic.s: Remove instruction
|
|
|
|
|
|
utilizing register 'lr' which is now an alias.
|
|
|
|
|
|
|
2017-05-25 11:40:07 +02:00
|
|
|
|
2017-06-06 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (reject_bad_reg): Allow REG_SP on ARMv8-A.
|
|
|
|
|
|
(parse_operands): Allow REG_SP for OP_oRRnpcsp and OP_RRnpcsp on
|
|
|
|
|
|
ARMv8-A.
|
|
|
|
|
|
(do_co_reg): Allow REG_SP for Rd on ARMv8-A.
|
|
|
|
|
|
(do_t_add_sub): Likewise.
|
|
|
|
|
|
(do_t_mov_cmp): Likewise.
|
|
|
|
|
|
(do_t_tb): Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/ld-sp-warn.l: Delete the warning on REG_SP as Rt for
|
|
|
|
|
|
ldrsb.
|
|
|
|
|
|
* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: New test.
|
|
|
|
|
|
* testsuite/gas/arm/sp-pc-validations-bad-t.d: Specifies -march=armv7-a.
|
|
|
|
|
|
* testsuite/gas/arm/sp-pc-validations-bad-t.s: Remove ".arch armv7-a".
|
|
|
|
|
|
* testsuite/gas/arm/sp-usage-thumb2-relax-on-v7.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/sp-usage-thumb2-relax-on-v7.l: New test.
|
|
|
|
|
|
* testsuite/gas/arm/sp-usage-thumb2-relax-on-v8.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/sp-usage-thumb2-relax.s: New test.
|
|
|
|
|
|
* testsuite/gas/arm/strex-bad-t.d: Specifies -march=armv7-a.
|
|
|
|
|
|
|
2017-06-06 02:25:02 +02:00
|
|
|
|
2017-06-05 Jim Wilson <jim.wilson@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Delete falkor and qdf24xx entries.
|
|
|
|
|
|
* doc/c-arm.texi (-mcpu): Likewise.
|
|
|
|
|
|
|
2017-04-07 16:22:39 +02:00
|
|
|
|
2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arc.c (cpu_types): Include arc-cpu.def
|
|
|
|
|
|
|
2017-05-23 15:49:35 +02:00
|
|
|
|
2017-05-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/testsuite/gas/i386/notrackbad.l: Updated for non-ELF
|
|
|
|
|
|
targets.
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
|
|
|
|
|
|
|
2017-05-23 12:18:11 +02:00
|
|
|
|
2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arc.c (md_apply_fix): Use as_bad_where.
|
|
|
|
|
|
(assemble_insn): Use as_bad.
|
|
|
|
|
|
|
2017-05-22 20:02:46 +02:00
|
|
|
|
2017-05-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (REX_PREFIX): Changed to 7.
|
|
|
|
|
|
(NOTRACK_PREFIX): New.
|
|
|
|
|
|
(MAX_PREFIXES): Changed to 8.
|
|
|
|
|
|
(_i386_insn): Add notrack_prefix.
|
|
|
|
|
|
(PREFIX_GROUP): Add PREFIX_DS.
|
|
|
|
|
|
(add_prefix): Return PREFIX_DS for DS_PREFIX_OPCODE.
|
|
|
|
|
|
(md_assemble): Check if NOTRACK prefix is supported.
|
|
|
|
|
|
(parse_insn): Set notrack_prefix and issue an error for
|
|
|
|
|
|
other prefixes after NOTRACK prefix.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run tests for NOTRACK prefix.
|
|
|
|
|
|
* testsuite/gas/i386/notrack-intel.d: New file.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrack.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/notrackbad.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
|
|
|
|
|
|
|
2017-05-22 10:50:19 +02:00
|
|
|
|
2017-05-22 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Set "arch" to "aarch64" if ${cpu} equals "aarch64".
|
|
|
|
|
|
Recognize the new triplet name aarch64*-linux-gnu_ilp32.
|
|
|
|
|
|
* configure.ac: Output DEFAULT_ARCH macro for AArch64.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* config/tc-aarch64.h (aarch64_after_parse_args): New declaration.
|
|
|
|
|
|
(md_after_parse_args): New define.
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_abi_type): New enumeration
|
|
|
|
|
|
AARCH64_ABI_NONE.
|
|
|
|
|
|
(DEFAULT_ARCH): New define.
|
|
|
|
|
|
(aarch64_abi): Set default value to AARCH64_ABI_NONE.
|
|
|
|
|
|
(aarch64_after_parse_args): New function.
|
|
|
|
|
|
|
binutils: support for the SPARC M8 processor
This patch adds support for the new SPARC M8 processor (implementing OSA
2017) to binutils.
New instructions:
- Dictionary Unpack
+ dictunpack
- Partitioned Compare with shifted result
+ Signed variants: fpcmp{le,gt,eq,ne}{8,16,32}shl
+ Unsigned variants: fpcmpu{le,gt}{8,16,32}shl
- Partitioned Dual-Equal compared, with shifted result
+ fpcmpde{8,16,32}shl
- Partitioned Unsigned Range Compare, with shifted result
+ fpcmpur{8,16,32}shl
- 64-bit shifts on Floating-Point registers
+ fps{ll,ra,rl}64x
- Misaligned loads and stores
+ ldm{sh,uh,sw,uw,x,ux}
+ ldm{sh,uh,sw,uw,x,ux}a
+ ldmf{s,d}
+ ldmf{s,d}a
+ stm{h,w,x}
+ stm{h,w,x}a
+ stmf{s,d}
+ stmf{s,d}a
- Oracle Numbers
+ on{add,sub,mul,div}
- Reverse Bytes/Bits
+ revbitsb
+ revbytes{h,w,x}
- Run-Length instructions
+ rle_burst
+ rle_length
- New crypto instructions
+ sha3
- Instruction to read the new register %entropy
+ rd %entropy
New Alternate Address Identifiers:
- 0x24, #ASI_CORE_COMMIT_COUNT
- 0x24, #ASI_CORE_SELECT_COUNT
- 0x48, #ASI_ARF_ECC_REG
- 0x53, #ASI_ITLB_PROBE
- 0x58, #ASI_DSFAR
- 0x5a, #ASI_DTLB_PROBE_PRIMARY
- 0x5b, #ASI_DTLB_PROBE_REAL
- 0x64, #ASI_CORE_SELECT_COMMIT_NHT
The new assembler command-line options for selecting the M8 architecture
are:
-Av9m8 or -Asparc6 for 64-bit binaries.
-Av8plusm8 for 32-bit (v8+) binaries.
The corresponding disassembler command-line options are:
-msparc:v9m8 for 64-bit binaries.
-msparc:v8plusm8 for 32-bit (v8+) binaries.
Tested for regressions in the following targets:
sparc-aout sparc-linux sparc-vxworks sparc64-linux
bfd/ChangeLog:
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* archures.c (bfd_mach_sparc_v9m8): Define.
(bfd_mach_sparc_v8plusm8): Likewise.
(bfd_mach_sparc_v9_p): Adjust to M8.
(bfd_mach_sparc_64bit_p): Likewise.
* aoutx.h (machine_type): Handle bfd_mach_sparc_v9m8 and
bfd_mach_sparc_v8plusm8.
* bfd-in2.h: Regenerated.
* cpu-sparc.c (arch_info_struct): Entries for sparc:v9m8 and
sparc:v8plusm8.
* elfxx-sparc.c (_bfd_sparc_elf_object_p): Handle
bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8 using the new hw
capabilities ONADDSUB, ONMUL, ONDIV, DICTUNP, FPCPSHL, RLE and
SHA3.
* elf32-sparc.c (elf32_sparc_final_write_processing): Handle
bfd_mach_sparc_v8plusm8.
binutils/ChangeLog:
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* NEWS: Mention the SPARC M8 support.
gas/ChangeLog:
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-sparc.c (sparc_arch_table): Entries for `sparc6',
`v9m8' and `v8plusm8'.
(sparc_md_end): Handle SPARC_OPCODE_ARCH_M8.
(get_hwcap_name): Support the M8 hardware capabilities.
(sparc_ip): Handle new operand types.
* doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and
-Asparc6, and the corresponding -xarch aliases.
* testsuite/gas/sparc/sparc6.s: New file.
* testsuite/gas/sparc/sparc6.d: Likewise.
* testsuite/gas/sparc/sparc6-diag.s: Likewise.
* testsuite/gas/sparc/sparc6-diag.l: Likewise.
* testsuite/gas/sparc/fpcmpshl.s: Likewise.
* testsuite/gas/sparc/fpcmpshl.d: Likewise.
* testsuite/gas/sparc/fpcmpshl-diag.s: Likewise.
* testsuite/gas/sparc/fpcmpshl-diag.l: Likewise.
* testsuite/gas/sparc/ldm-stm.s: Likewise.
* testsuite/gas/sparc/ldm-stm.d: Likewise.
* testsuite/gas/sparc/ldm-stm-diag.s: Likewise.
* testsuite/gas/sparc/ldm-stm-diag.l: Likewise.
* testsuite/gas/sparc/ldmf-stmf.s: Likewise.
* testsuite/gas/sparc/ldmf-stmf.d: Likewise.
* testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise.
* testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise.
* testsuite/gas/sparc/on.s: Likewise.
* testsuite/gas/sparc/on.d: Likewise.
* testsuite/gas/sparc/on-diag.s: Likewise.
* testsuite/gas/sparc/on-diag.l: Likewise.
* testsuite/gas/sparc/rle.s: Likewise.
* testsuite/gas/sparc/rle.d: Likewise.
* testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests.
* testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY.
* testsuite/gas/sparc/rdasr.d: Likewise.
include/ChangeLog:
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
(ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
(ELF_SPARC_HWCAP2_ONMUL): Likewise.
(ELF_SPARC_HWCAP2_ONDIV): Likewise.
(ELF_SPARC_HWCAP2_DICTUNP): Likewise.
(ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
(ELF_SPARC_HWCAP2_RLE): Likewise.
(ELF_SPARC_HWCAP2_SHA3): Likewise.
* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
and adjust SPARC_OPCODE_ARCH_MAX.
(HWCAP2_SPARC6): Define.
(HWCAP2_ONADDSUB): Likewise.
(HWCAP2_ONMUL): Likewise.
(HWCAP2_ONDIV): Likewise.
(HWCAP2_DICTUNP): Likewise.
(HWCAP2_FPCMPSHL): Likewise.
(HWCAP2_RLE): Likewise.
(HWCAP2_SHA3): Likewise.
(OPM): Likewise.
(OPMI): Likewise.
(ONFCN): Likewise.
(REVFCN): Likewise.
(SIMM10): Likewise.
opcodes/ChangeLog:
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-dis.c (MASK_V9): Include SPARC_OPCODE_ARCH_M8.
(X_IMM2): Define.
(compute_arch_mask): Handle bfd_mach_sparc_v8plusm8 and
bfd_mach_sparc_v9m8.
(print_insn_sparc): Handle new operand types.
* sparc-opc.c (MASK_M8): Define.
(v6): Add MASK_M8.
(v6notlet): Likewise.
(v7): Likewise.
(v8): Likewise.
(v9): Likewise.
(v9a): Likewise.
(v9b): Likewise.
(v9c): Likewise.
(v9d): Likewise.
(v9e): Likewise.
(v9v): Likewise.
(v9m): Likewise.
(v9andleon): Likewise.
(m8): Define.
(HWS_VM8): Define.
(HWS2_VM8): Likewise.
(sparc_opcode_archs): Add entry for "m8".
(sparc_opcodes): Add OSA2017 and M8 instructions
dictunpack, fpcmp{ule,ugt,eq,ne,de,ur}{8,16,32}shl,
fpx{ll,ra,rl}64x,
ldm{sh,uh,sw,uw,x,ux}, ldm{sh,uh,sw,uw,x,ux}a, ldmf{s,d},
ldmf{s,d}a, on{add,sub,mul,div}, rdentropy, revbitsb,
revbytes{h,w,x}, rle_burst, rle_length, sha3, stm{h,w,x},
stm{h,w,x}a, stmf{s,d}, stmf{s,d}a.
(asi_table): New M8 ASIs ASI_CORE_COMMIT_COUNT,
ASI_CORE_SELECT_COUNT, ASI_ARF_ECC_REG, ASI_ITLB_PROBE, ASI_DSFAR,
ASI_DTLB_PROBE_PRIMARY, ASI_DTLB_PROBE_REAL,
ASI_CORE_SELECT_COMMIT_NHT.
2017-05-19 18:27:08 +02:00
|
|
|
|
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (sparc_arch_table): Entries for `sparc6',
|
|
|
|
|
|
`v9m8' and `v8plusm8'.
|
|
|
|
|
|
(sparc_md_end): Handle SPARC_OPCODE_ARCH_M8.
|
|
|
|
|
|
(get_hwcap_name): Support the M8 hardware capabilities.
|
|
|
|
|
|
(sparc_ip): Handle new operand types.
|
|
|
|
|
|
* doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and
|
|
|
|
|
|
-Asparc6, and the corresponding -xarch aliases.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc6.s: New file.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc6-diag.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc6-diag.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/fpcmpshl.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/fpcmpshl.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/fpcmpshl-diag.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/fpcmpshl-diag.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldm-stm.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldm-stm.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldm-stm-diag.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldm-stm-diag.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldmf-stmf.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldmf-stmf.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/on.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/on.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/on-diag.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/on-diag.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/rle.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/rle.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests.
|
|
|
|
|
|
* testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY.
|
|
|
|
|
|
* testsuite/gas/sparc/rdasr.d: Likewise.
|
|
|
|
|
|
|
2017-05-19 15:59:41 +02:00
|
|
|
|
2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/sparc/call-relax.d: Support 32-bit targets.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp (gas_64_check): Use -64 to
|
|
|
|
|
|
run asi-bump-warn.
|
|
|
|
|
|
|
2017-05-19 16:06:33 +02:00
|
|
|
|
2017-05-19 Georg-Johann Lay <avr@gjlay.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/21472
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add entries for: attiny416,
|
|
|
|
|
|
attiny417, attiny816, attiny817.
|
|
|
|
|
|
|
2017-05-18 07:17:40 +02:00
|
|
|
|
2017-05-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE.
|
|
|
|
|
|
* config/tc-hppa.c: Likewise.
|
|
|
|
|
|
* config/tc-mips.c: Likewise.
|
|
|
|
|
|
* config/tc-score7.c: Likewise.
|
|
|
|
|
|
|
2017-05-16 01:13:24 +02:00
|
|
|
|
2017-05-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define.
|
|
|
|
|
|
(TC_FORCE_RELOCATION_LOCAL): Use it.
|
|
|
|
|
|
(GENERIC_FORCE_RELOCATION_SUB_SAME): Define.
|
|
|
|
|
|
(TC_FORCE_RELOCATION_SUB_SAME): Use it.
|
|
|
|
|
|
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL,
|
|
|
|
|
|
TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines.
|
|
|
|
|
|
* config/tc-aarch64.h: Similarly.
|
|
|
|
|
|
* config/tc-avr.h: Similarly.
|
|
|
|
|
|
* config/tc-cris.h: Similarly.
|
|
|
|
|
|
* config/tc-i386.h: Similarly.
|
|
|
|
|
|
* config/tc-i960.h: Similarly.
|
|
|
|
|
|
* config/tc-ia64.h: Similarly.
|
|
|
|
|
|
* config/tc-microblaze.h: Similarly.
|
|
|
|
|
|
* config/tc-mips.h: Similarly.
|
|
|
|
|
|
* config/tc-msp430.h: Similarly.
|
|
|
|
|
|
* config/tc-nds32.h: Similarly.
|
|
|
|
|
|
* config/tc-pru.h: Similarly.
|
|
|
|
|
|
* config/tc-riscv.h: Similarly.
|
|
|
|
|
|
* config/tc-rl78.h: Similarly.
|
|
|
|
|
|
* config/tc-s390.h: Similarly.
|
|
|
|
|
|
* config/tc-sh.h: Similarly.
|
|
|
|
|
|
* config/tc-sh64.h: Similarly.
|
|
|
|
|
|
* config/tc-sparc.h: Similarly.
|
|
|
|
|
|
* config/tc-xtensa.h: Similarly.
|
|
|
|
|
|
* config/tc-mn10300.h: Similarly.
|
|
|
|
|
|
(GENERIC_FORCE_RELOCATION_LOCAL): Define.
|
|
|
|
|
|
* config/tc-msp430.c (msp430_force_relocation_local): Modify to
|
|
|
|
|
|
be addition to rather than replacement of standard
|
|
|
|
|
|
TC_FORCE_RELOCATION_LOCAL.
|
|
|
|
|
|
|
2017-05-15 16:29:02 +02:00
|
|
|
|
2017-05-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21458
|
|
|
|
|
|
* config/tc-arm.c (do_adr): If the ADR involves a thumb function
|
|
|
|
|
|
symbol, ensure that the T bit will be set.
|
|
|
|
|
|
(do_adrl): Likewise.
|
|
|
|
|
|
(do_t_adr): Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/pr21458.s: New test.
|
|
|
|
|
|
* testsuite/gas/arm/pr21458.d: New test driver.
|
|
|
|
|
|
|
2017-05-15 14:52:04 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
|
|
|
|
|
|
flags.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
|
|
|
|
|
|
Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d:
|
|
|
|
|
|
New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment
|
|
|
|
|
|
preservation between MIPS16 and MIPS16e2 code.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over
|
|
|
|
|
|
all MIPS16 architectures.
|
|
|
|
|
|
|
2017-05-15 14:45:42 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-hilo.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-lui.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-sub.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-lui.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
|
|
|
|
|
|
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
|
|
|
|
|
|
architectures. Run the new tests.
|
|
|
|
|
|
|
2017-05-15 14:40:50 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
|
|
|
|
|
|
`mips16e2@' prefix.
|
|
|
|
|
|
(run_list_test_arch): Likewise.
|
|
|
|
|
|
(mips16e2-32, mips16e2-64): New architectures.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2@relax-swap3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source'
|
|
|
|
|
|
tag. Add `-I$srcdir/$subdir' to `as' flags.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-sub.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-64-sub.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test
|
|
|
|
|
|
source.
|
|
|
|
|
|
|
MIPS16e2: Add MIPS16e2 ASE support
Add MIPS16e2 ASE support as per the architecture specification[1],
including in particular:
1. A new ELF ASE flag to mark MIPS16e2 binaries.
2. MIPS16e2 instruction assembly support, including a relaxation update
to use LUI rather than an LI/SLL instruction pair for loading the
high part of 32-bit addresses.
3. MIPS16e2 instruction disassembly support, including updated rules for
extended forms of instructions that are now subdecoded and therefore
do not alias to the original MIPS16 ISA revision instructions even
for encodings that are not valid in the MIPS16e2 instruction set.
Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their
corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and
`.module' pseudo-ops. Control the availability of the MT ASE subset of
the MIPS16e2 instruction set with a combination of these controls and
the preexisting MT ASE controls.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific
Extension Technical Reference Manual", Imagination Technologies
Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016
include/
* elf/mips.h (AFL_ASE_MIPS16E2): New macro.
(AFL_ASE_MASK): Adjust accordingly.
* opcode/mips.h: Document new operand codes defined.
(mips_operand_type): Add OP_REG28 enum value.
(INSN2_SHORT_ONLY): Update description.
(ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
bfd/
* elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.
opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and
ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry.
(mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag.
(print_insn_arg) <OP_REG28>: Add handler.
(validate_insn_args) <OP_REG28>: Handle.
(print_mips16_insn_arg): Handle MIPS16 instructions that require
32-bit encoding and 9-bit immediates.
(print_insn_mips16): Handle MIPS16 instructions that require
32-bit encoding and MFC0/MTC0 operand decoding.
* mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'>
<'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers.
(RD_C0, WR_C0, E2, E2MT): New macros.
(mips16_opcodes): Add entries for MIPS16e2 instructions:
GP-relative "addiu" and its "addu" spelling, "andi", "cache",
"di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh",
"lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0",
"movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause",
"pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw"
instructions, "swl", "swr", "sync" and its "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases,
"xori", "dmt", "dvpe", "emt" and "evpe". Add split
regular/extended entries for original MIPS16 ISA revision
instructions whose extended forms are subdecoded in the MIPS16e2
ISA revision: "li", "sll" and "srl".
binutils/
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.
gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
(RELAX_MIPS16_E2): New macro.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
(mips16_immed_extend): New prototype.
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
values.
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
(mips_ases): Add "mips16e2" entry.
(mips_set_ase): Handle MIPS16e2 ASE.
(insn_insert_operand): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(is_opcode_valid_16): Pass enabled ASE bitmask on to
`opcode_is_member'.
(validate_mips_insn): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(operand_reg_mask) <OP_REG28>: Add handler.
(match_reg28_operand): New function.
(match_operand) <OP_REG28>: Add handler.
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
(match_mips16_insn): Handle MIPS16 instructions that require
32-bit encoding and `V' and `u' operand codes.
(mips16_ip): Allow any characters except from `.' in opcodes.
(mips16_immed_extend): Handle 9-bit immediates. Do not shuffle
immediates whose width is not one of these listed.
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
(mips_convert_ase_flags): Handle MIPS16e2 ASE.
* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(-mmips16e2, -mno-mips16e2): New options.
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
and `.set nomips16e2'.
2017-05-15 14:26:01 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
Matthew Fortune <matthew.fortune@imgtec.com>
|
|
|
|
|
|
Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
|
|
|
|
|
|
(RELAX_MIPS16_E2): New macro.
|
|
|
|
|
|
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
|
|
|
|
|
|
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
|
|
|
|
|
|
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
|
|
|
|
|
|
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
|
|
|
|
|
|
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
|
|
|
|
|
|
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
|
|
|
|
|
|
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
|
|
|
|
|
|
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
|
|
|
|
|
|
(mips16_immed_extend): New prototype.
|
|
|
|
|
|
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
|
|
|
|
|
|
values.
|
|
|
|
|
|
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
|
|
|
|
|
|
(mips_ases): Add "mips16e2" entry.
|
|
|
|
|
|
(mips_set_ase): Handle MIPS16e2 ASE.
|
|
|
|
|
|
(insn_insert_operand): Explicitly handle immediates with MIPS16
|
|
|
|
|
|
instructions that require 32-bit encoding.
|
|
|
|
|
|
(is_opcode_valid_16): Pass enabled ASE bitmask on to
|
|
|
|
|
|
`opcode_is_member'.
|
|
|
|
|
|
(validate_mips_insn): Explicitly handle immediates with MIPS16
|
|
|
|
|
|
instructions that require 32-bit encoding.
|
|
|
|
|
|
(operand_reg_mask) <OP_REG28>: Add handler.
|
|
|
|
|
|
(match_reg28_operand): New function.
|
|
|
|
|
|
(match_operand) <OP_REG28>: Add handler.
|
|
|
|
|
|
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
|
|
|
|
|
|
(match_mips16_insn): Handle MIPS16 instructions that require
|
|
|
|
|
|
32-bit encoding and `V' and `u' operand codes.
|
|
|
|
|
|
(mips16_ip): Allow any characters except from `.' in opcodes.
|
|
|
|
|
|
(mips16_immed_extend): Handle 9-bit immediates. Do not shuffle
|
|
|
|
|
|
immediates whose width is not one of these listed.
|
|
|
|
|
|
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
|
|
|
|
|
|
(mips_relax_frag): Likewise.
|
|
|
|
|
|
(md_convert_frag): Likewise.
|
|
|
|
|
|
(mips_convert_ase_flags): Handle MIPS16e2 ASE.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
|
|
|
|
|
|
`-mno-mips16e2' options.
|
|
|
|
|
|
(-mmips16e2, -mno-mips16e2): New options.
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
|
|
|
|
|
|
`-mno-mips16e2' options.
|
|
|
|
|
|
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
|
|
|
|
|
|
and `.set nomips16e2'.
|
|
|
|
|
|
|
MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnostics
Improve out-of-range operand error diagnostics for invalid values in the
[32768,65535] range used for a signed 16-bit immediate, making the
message consistent with that used for other invalid values, e.g.:
foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768'
foo.s:2: Error: invalid operands `lw $2,32768($gp)'
vs:
foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769'
foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)'
This case does not currently trigger however, for two reasons.
First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.
Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for signed 16-bit immediates, because such immediates are
currently only matched with extensible instructions, and these are
handled in `match_mips16_insn' via `match_expression' directly rather
than via `match_operand'.
This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting signed 16-bit immediates will be
added, so make the case work well right from the start:
foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768'
foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)'
gas/
* config/tc-mips.c (match_int_operand): Call
`match_out_of_range' before returning failure for 0x8000-0xffff
values conditionally allowed.
2017-05-15 14:21:01 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_int_operand): Call
|
|
|
|
|
|
`match_out_of_range' before returning failure for 0x8000-0xffff
|
|
|
|
|
|
values conditionally allowed.
|
|
|
|
|
|
|
MIPS16/GAS: Improve non-constant operand error diagnostics
Improve operand error diagnostics for non-constant expressions used for
a 16-bit immediate, making the message more descriptive and indicating
the offending operand, e.g.:
foo.s:1: Error: invalid operands `lui $2,foo-bar'
will show as:
foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar'
This case does not currently trigger however, for two reasons.
First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.
Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for 16-bit immediates, because such immediates are currently
only matched with extensible instructions, and these are handled in
`match_mips16_insn' via `match_expression' directly rather than via
`match_operand'.
This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting 16-bit immediates will be added,
so make the case work well right from the start.
gas/
* config/tc-mips.c (match_int_operand): Call
`match_not_constant' before returning failure for a non-constant
16-bit immediate conditionally allowed.
2017-05-15 14:19:20 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_int_operand): Call
|
|
|
|
|
|
`match_not_constant' before returning failure for a non-constant
|
|
|
|
|
|
16-bit immediate conditionally allowed.
|
|
|
|
|
|
|
2017-05-15 14:17:18 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_const_int): Call `match_out_of_range'
|
|
|
|
|
|
rather than `match_not_constant' for unrelocated operands
|
|
|
|
|
|
retrieved as an `O_big' expression.
|
|
|
|
|
|
(match_int_operand): Call `match_out_of_range' for relocatable
|
|
|
|
|
|
operands retrieved as an `O_big' expression.
|
|
|
|
|
|
(match_mips16_insn): Call `match_out_of_range' for relaxable
|
|
|
|
|
|
operands retrieved as an `O_big' expression.
|
|
|
|
|
|
* testsuite/gas/mips/addiu-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@addiu-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@addiu-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/break-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/lui-1.l: Adjust error message.
|
|
|
|
|
|
* testsuite/gas/mips/addiu-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16@addiu-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@addiu-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/break-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/addiu-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/break-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
MIPS16/GAS: Improve non-immediate operand error diagnostics
Improve non-immediate operand error diagnostics for extensible MIPS16
instructions and make it match corresponding regular MIPS and microMIPS
handling, e.g:
$ cat addiu.s
addiu $4, $3, $2
$ as -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: invalid operands `addiu $4,$3,$2'
$
To do so observe that for extensible MIPS16 instructions and a non-PC
relative operand this case is handled by an explicit OT_INTEGER check in
`match_mips16_insn' returning a failure right away and consequently
preventing a call to `match_expression' from being made. As from commit
d436c1c2e889 ("Improve error reporting for register expressions"),
<https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the
check has become redundant as `match_expression' now only ever returns
success for OT_INTEGER argument tokens, and a special case of an OT_CHAR
`(' token already handled by `match_mips16_insn' just ahead of the
`match_expression' call. Previously it also returned success for OT_REG
argument tokens.
Let the call to `match_expression' always happen then, yielding the same
failure for the affected cases, however with more accurate diagnostics
provided by the call making reporting consistent:
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$
gas/
* config/tc-mips.c (match_mips16_insn): Remove the explicit
OT_INTEGER check before the `match_expression' call.
* testsuite/gas/mips/mips16-insn-e.l: Adjust messages.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-reg-error.d: New test.
* testsuite/gas/mips/mips16-reg-error.l: New stderr output.
* testsuite/gas/mips/mips16-reg-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15 14:13:41 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_mips16_insn): Remove the explicit
|
|
|
|
|
|
OT_INTEGER check before the `match_expression' call.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-insn-e.l: Adjust messages.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reg-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reg-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reg-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
|
2017-05-15 14:09:37 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_mips16_insn): Call
|
|
|
|
|
|
`match_not_constant' for a disallowed relocation operation.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reloc-error.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reloc-error.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-reloc-error.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
|
2017-05-15 14:06:54 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/lui-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/lui-2.d: New test.
|
|
|
|
|
|
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
|
|
|
|
|
|
into the new tests.
|
|
|
|
|
|
|
2017-05-15 14:02:16 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (match_const_int): Update description.
|
|
|
|
|
|
|
2017-05-15 13:47:26 +02:00
|
|
|
|
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (-mips16, -no-mips16): Refer to `.module
|
|
|
|
|
|
mips16' rather than `.set mips16'.
|
|
|
|
|
|
(-mmicromips, -mno-micromips): Refer to `.module micromips' and
|
|
|
|
|
|
`.module nomicromips' rather than `.set micromips' and `.set
|
|
|
|
|
|
nomicromips'.
|
|
|
|
|
|
(-msmartmips, -mno-smartmips): Refer to `.module smartmips'
|
|
|
|
|
|
rather than `.set smartmips'.
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Options): Refer to `.module mips16',
|
|
|
|
|
|
`.module micromips', `.module nomicromips' and `.module
|
|
|
|
|
|
smartmips' rather than `.set mips16', `.set micromips', `.set
|
|
|
|
|
|
nomicromips' and `.set smartmips' respectively.
|
|
|
|
|
|
|
2017-05-12 03:28:54 +02:00
|
|
|
|
2017-05-12 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
Matthew Fortune <matthew.fortune@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_percent_op): Add "%gprel".
|
|
|
|
|
|
(mips16_percent_op): Add "%gp_rel".
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms.
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms.
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel8.d: Adjust accordingly.
|
|
|
|
|
|
* testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
|
|
|
|
|
|
|
2017-05-12 02:09:36 +02:00
|
|
|
|
2017-05-12 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-macro.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
|
|
|
|
|
|
|
MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases
Following the way how descriptive SYNC mnemonics have been defined in
the architecture[1][2] mark them as aliases, so that the generic SYNC
instruction can be alternatively disassembled along with its immediate
operand, as noted in the documents referred.
References:
[1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 305
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 481
opcodes/
* mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
"syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
"sync_rmb" and "sync_wmb" as aliases.
* micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.
gas/
* testsuite/gas/mips/mips32r2-sync-1.d: New test.
* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-12 01:46:45 +02:00
|
|
|
|
2017-05-11 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips32r2-sync-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-05-10 21:14:11 +02:00
|
|
|
|
2017-05-10 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r2@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r3@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r5@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r6@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon3@isa-override-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@isa-override-2.l: Remove list test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@isa-override-2.s: Remove test source.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@isa-override-2.s: Remove test source.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@isa-override-2.s: Remove test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@isa-override-2.s: Remove test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/octeon3@isa-override-2.s: Remove test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
|
|
|
|
|
|
into the new tests.
|
|
|
|
|
|
|
2017-05-10 19:19:56 +02:00
|
|
|
|
2017-05-10 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-sub.d: Correct test name.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-64-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise.
|
|
|
|
|
|
|
2017-05-10 15:37:21 +02:00
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2017-05-10 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/gas/mips/mips16-macro.l: Remove list test.
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2017-05-10 15:17:19 +02:00
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2017-05-10 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/gas/mips/r3900@ecoff@ld.d: Remove test.
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* testsuite/gas/mips/mips2@ecoff@ld.d: Remove test.
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* testsuite/gas/mips/mips32@ecoff@ld.d: Remove test.
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* testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test.
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* testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test.
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* testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test.
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* testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test.
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* testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test.
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* testsuite/gas/mips/mips1@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/r3000@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/r3900@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/mips2@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/mips32@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test.
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* testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test.
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* testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test.
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* testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test.
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* testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test.
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* testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test.
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* testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test.
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[ARC] Object attributes.
gas/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/attr-arc600.d: New file.
* testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc600_norm.d: Likewise.
* testsuite/gas/arc/attr-arc601.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul64.d: Likewise.
* testsuite/gas/arc/attr-arc601_norm.d: Likewise.
* testsuite/gas/arc/attr-arc700.d: Likewise.
* testsuite/gas/arc/attr-arcem.d: Likewise.
* testsuite/gas/arc/attr-archs.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.s: Likewise.
* testsuite/gas/arc/attr-cpu-a601.d: Likewise.
* testsuite/gas/arc/attr-cpu-a601.s: Likewise.
* testsuite/gas/arc/attr-cpu-a700.d: Likewise.
* testsuite/gas/arc/attr-cpu-a700.s: Likewise.
* testsuite/gas/arc/attr-cpu-em.d: Likewise.
* testsuite/gas/arc/attr-cpu-em.s: Likewise.
* testsuite/gas/arc/attr-cpu-hs.d: Likewise.
* testsuite/gas/arc/attr-cpu-hs.s: Likewise.
* testsuite/gas/arc/attr-em.d: Likewise.
* testsuite/gas/arc/attr-em4.d: Likewise.
* testsuite/gas/arc/attr-em4_dmips.d: Likewise.
* testsuite/gas/arc/attr-em4_fpuda.d: Likewise.
* testsuite/gas/arc/attr-em4_fpus.d: Likewise.
* testsuite/gas/arc/attr-hs.d: Likewise.
* testsuite/gas/arc/attr-hs34.d: Likewise.
* testsuite/gas/arc/attr-hs38.d: Likewise.
* testsuite/gas/arc/attr-hs38_linux.d: Likewise.
* testsuite/gas/arc/attr-mul64.d: Likewise.
* testsuite/gas/arc/attr-name.d: Likewise.
* testsuite/gas/arc/attr-name.s: Likewise.
* testsuite/gas/arc/attr-nps400.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.s
* testsuite/gas/arc/attr-quarkse_em.d: Likewise.
* testsuite/gas/arc/blank.s: Likewise.
* testsuite/gas/elf/section2.e-arc: Likewise.
* testsuite/gas/arc/cpu-pseudop-1.d: Update test.
* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
* testsuite/gas/arc/nps400-0.d: Likewise.
* testsuite/gas/elf/elf.exp: Set target_machine for ARC.
* config/tc-arc.c (opcode/arc-attrs.h): Include.
(ARC_GET_FLAG, ARC_SET_FLAG, streq): Define.
(arc_attribute): Declare new function.
(md_pseudo_table): Add arc_attribute.
(cpu_types): Rename default cpu features.
(selected_cpu): Set the default OSABI flag.
(mpy_option): New variable.
(pic_option): Likewise.
(sda_option): Likewise.
(tls_option): Likewise.
(feature_type, feature_list): Remove.
(arc_initial_eflag): Likewise.
(attributes_set_explicitly): New variable.
(arc_check_feature): Check also for the conflicting features.
(arc_select_cpu): Refactor assignment of selected_cpu.eflags.
(arc_option): Remove setting of private flags and architecture.
(check_cpu_feature): Refactor feature names.
(autodetect_attributes): New function.
(assemble_tokens): Use above function.
(md_parse_option): Refactor feature names.
(arc_attribute): New function.
(arc_set_attribute_int): Likewise.
(arc_set_attribute_string): Likewise.
(arc_stralloc): Likewise.
(arc_set_public_attributes): Likewise.
(arc_md_end): Likewise.
(arc_copy_symbol_attributes): Likewise.
(rc_convert_symbolic_attribute): Likewise.
* config/tc-arc.h (md_end): Define.
(CONVERT_SYMBOLIC_ATTRIBUTE): Likewise.
(TC_COPY_SYMBOL_ATTRIBUTES): Likewise.
* doc/c-arc.texi: Document ARC object attributes.
binutils/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* readelf.c (decode_ARC_machine_flags): Recognize OSABI v4.
(get_arc_section_type_name): New function.
(get_section_type_name): Use the above function.
(display_arc_attribute): New function.
(process_arc_specific): Likewise.
(process_arch_specific): Handle ARC specific information.
* testsuite/binutils-all/strip-3.d: Consider ARC.attributes
section.
include/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
(Tag_ARC_*): Define.
(E_ARC_OSABI_V4): Define.
(E_ARC_OSABI_CURRENT): Reassign it.
(TAG_CPU_*): Define.
* opcode/arc-attrs.h: New file.
* opcode/arc.h (insn_subclass_t): Assign enum values.
(insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
(ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
(ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
(ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
(ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
(ARC_CRC): Delete.
bfd/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (FEATURE_LIST_NAME): Define.
(CONFLICT_LIST): Likewise.
(opcode/arc-attrs.h): Include.
(arc_elf_print_private_bfd_data): Print OSABI v4 flag.
(arc_extract_features): New file.
(arc_stralloc): Likewise.
(arc_elf_merge_attributes): Likewise.
(arc_elf_merge_private_bfd_data): Use object attributes.
(bfd_arc_get_mach_from_attributes): New function.
(arc_elf_object_p): Use object attributes.
(arc_elf_final_write_processing): Likewise.
(elf32_arc_obj_attrs_arg_type): New function.
(elf32_arc_obj_attrs_handle_unknown): Likewise.
(elf32_arc_section_from_shdr): Likewise.
(elf_backend_obj_attrs_vendor): Define.
(elf_backend_obj_attrs_section): Likewise.
(elf_backend_obj_attrs_arg_type): Likewise.
(elf_backend_obj_attrs_section_type): Likewise.
(elf_backend_obj_attrs_handle_unknown): Likewise.
(elf_backend_section_from_shdr): Likewise.
ld/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/ld-arc/attr-merge-0.d: New file.
* testsuite/ld-arc/attr-merge-0.s: Likewise.
* testsuite/ld-arc/attr-merge-0e.s: Likewise.
* testsuite/ld-arc/attr-merge-1.d: Likewise.
* testsuite/ld-arc/attr-merge-1.s: Likewise.
* testsuite/ld-arc/attr-merge-1e.s: Likewise.
* testsuite/ld-arc/attr-merge-2.d: Likewise.
* testsuite/ld-arc/attr-merge-2.s: Likewise.
* testsuite/ld-arc/attr-merge-3.d: Likewise.
* testsuite/ld-arc/attr-merge-3.s: Likewise.
* testsuite/ld-arc/attr-merge-3e.s: Likewise.
* testsuite/ld-arc/attr-merge-4.s: Likewise.
* testsuite/ld-arc/attr-merge-5.d: Likewise.
* testsuite/ld-arc/attr-merge-5a.s: Likewise.
* testsuite/ld-arc/attr-merge-5b.s: Likewise.
* testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-err-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise.
* testsuite/ld-arc/got-01.d: Update test.
* testsuite/ld-arc/attr-merge-err-quarkse.d: New file.
* testsuite/ld-arc/attr-quarkse.s: Likewise.
* testsuite/ld-arc/attr-quarkse2.s: Likewise.
opcodes/
2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
* arc-dis.c (parse_option): Update quarkse_em option..
* arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to
QUARKSE1.
(dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
2017-05-10 14:42:22 +02:00
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2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
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* testsuite/gas/arc/attr-arc600.d: New file.
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* testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise.
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* testsuite/gas/arc/attr-arc600_norm.d: Likewise.
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* testsuite/gas/arc/attr-arc601.d: Likewise.
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* testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise.
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* testsuite/gas/arc/attr-arc601_mul64.d: Likewise.
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* testsuite/gas/arc/attr-arc601_norm.d: Likewise.
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* testsuite/gas/arc/attr-arc700.d: Likewise.
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* testsuite/gas/arc/attr-arcem.d: Likewise.
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* testsuite/gas/arc/attr-archs.d: Likewise.
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* testsuite/gas/arc/attr-autodetect-1.d: Likewise.
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* testsuite/gas/arc/attr-autodetect-1.s: Likewise.
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* testsuite/gas/arc/attr-cpu-a601.d: Likewise.
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* testsuite/gas/arc/attr-cpu-a601.s: Likewise.
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* testsuite/gas/arc/attr-cpu-a700.d: Likewise.
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* testsuite/gas/arc/attr-cpu-a700.s: Likewise.
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* testsuite/gas/arc/attr-cpu-em.d: Likewise.
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* testsuite/gas/arc/attr-cpu-em.s: Likewise.
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* testsuite/gas/arc/attr-cpu-hs.d: Likewise.
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* testsuite/gas/arc/attr-cpu-hs.s: Likewise.
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* testsuite/gas/arc/attr-em.d: Likewise.
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* testsuite/gas/arc/attr-em4.d: Likewise.
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* testsuite/gas/arc/attr-em4_dmips.d: Likewise.
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* testsuite/gas/arc/attr-em4_fpuda.d: Likewise.
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* testsuite/gas/arc/attr-em4_fpus.d: Likewise.
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* testsuite/gas/arc/attr-hs.d: Likewise.
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* testsuite/gas/arc/attr-hs34.d: Likewise.
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* testsuite/gas/arc/attr-hs38.d: Likewise.
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* testsuite/gas/arc/attr-hs38_linux.d: Likewise.
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* testsuite/gas/arc/attr-mul64.d: Likewise.
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* testsuite/gas/arc/attr-name.d: Likewise.
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* testsuite/gas/arc/attr-name.s: Likewise.
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* testsuite/gas/arc/attr-nps400.d: Likewise.
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* testsuite/gas/arc/attr-override-mcpu.d: Likewise.
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* testsuite/gas/arc/attr-override-mcpu.s
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* testsuite/gas/arc/attr-quarkse_em.d: Likewise.
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* testsuite/gas/arc/blank.s: Likewise.
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* testsuite/gas/elf/section2.e-arc: Likewise.
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* testsuite/gas/arc/cpu-pseudop-1.d: Update test.
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* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
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* testsuite/gas/arc/nps400-0.d: Likewise.
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* testsuite/gas/elf/elf.exp: Set target_machine for ARC.
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* config/tc-arc.c (opcode/arc-attrs.h): Include.
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(ARC_GET_FLAG, ARC_SET_FLAG, streq): Define.
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(arc_attribute): Declare new function.
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(md_pseudo_table): Add arc_attribute.
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(cpu_types): Rename default cpu features.
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(selected_cpu): Set the default OSABI flag.
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(mpy_option): New variable.
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(pic_option): Likewise.
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(sda_option): Likewise.
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(tls_option): Likewise.
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(feature_type, feature_list): Remove.
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(arc_initial_eflag): Likewise.
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(attributes_set_explicitly): New variable.
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(arc_check_feature): Check also for the conflicting features.
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(arc_select_cpu): Refactor assignment of selected_cpu.eflags.
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(arc_option): Remove setting of private flags and architecture.
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(check_cpu_feature): Refactor feature names.
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(autodetect_attributes): New function.
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(assemble_tokens): Use above function.
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(md_parse_option): Refactor feature names.
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(arc_attribute): New function.
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(arc_set_attribute_int): Likewise.
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(arc_set_attribute_string): Likewise.
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(arc_stralloc): Likewise.
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(arc_set_public_attributes): Likewise.
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(arc_md_end): Likewise.
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(arc_copy_symbol_attributes): Likewise.
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(rc_convert_symbolic_attribute): Likewise.
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* config/tc-arc.h (md_end): Define.
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(CONVERT_SYMBOLIC_ATTRIBUTE): Likewise.
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(TC_COPY_SYMBOL_ATTRIBUTES): Likewise.
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* doc/c-arc.texi: Document ARC object attributes.
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MIPS16/GAS: Relax 32-bit non-PIC PC-relative synthetic instructions
Implement the relaxation of MIPS16 PC-relative synthetic LA, DLA, LW and
LD instructions to an equivalent sequence of instructions produced where
the address operand requested is out of range, absolute or requires
linker relocation, for ABIs that use 32-bit addressing and non-PIC code.
The sequence generated uses the register specified for the destination
operand as a temporary and begins with LI to load the high 16-bit part
of the address, then continues with SLL by 16 bits to move that part
into place and finally completes with a suitable operation corresponding
to the synthetic instruction used, one of: 2-argument ADDIU, 2-argument
DADDIU, absolute LW, and absolute LD respectively, providing the low
16-bit part of the address. All instructions use the extended encoding.
As a special exception accept absolute addresses for relaxation even in
PIC code.
For example:
la $2, 0x12345678
produces code as:
li $2, 0x1234
sll $2, $2, 16
addiu $2, 0x5678
would.
Where linker relocation is required emit an R_MIPS16_HI16 relocation on
the initial LI instruction and an R_MIPS16_LO16 relocation on the final
operation.
For example (where `foo' is not local):
lw $3, foo
produces code as:
li $3, %hi(foo)
sll $3, $3, 16
lw $3, %lo(foo)($3)
would.
Emit assembly warnings as appropriate where this new relaxation triggers
in the `nomacro' mode or for an instruction manually placed in a branch
delay slot in the `noreorder' mode. Refrain from relaxation where an
explicit instruction size suffix has been used and in the `noautoextend'
mode.
gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and
`nomacro' flags.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO):
New macros.
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits.
(RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO)
(RELAX_MIPS16_CLEAR_MACRO): New macros.
(append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and
`mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE.
(mips16_macro_frag): New function.
(md_estimate_size_before_relax): Handle HI16/LO16 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
* testsuite/gas/mips/mips16@relax-swap3.d: Remove error output,
add dump patterns.
* testsuite/gas/mips/mips16e@relax-swap3.d: New test
subarchitecture.
* testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing
NOP padding.
* testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16@relax-swap3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file.
* testsuite/gas/mips/relax-swap3.s: Adjust trailing padding.
* testsuite/gas/mips/mips16-pcrel-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-2.d: New test.
* testsuite/gas/mips/mips16-pcrel-3.d: New test.
* testsuite/gas/mips/mips16-pcrel-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-pic-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-pic-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-delay-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-delay-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-7.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16-pcrel-0.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-1.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-2.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-3.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-4.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-5.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr
output.
* testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr
output.
* testsuite/gas/mips/mips16-pcrel-0.s: New test source.
* testsuite/gas/mips/mips16-pcrel-1.s: New test source.
* testsuite/gas/mips/mips16-pcrel-2.s: New test source.
* testsuite/gas/mips/mips16-pcrel-3.s: New test source.
* testsuite/gas/mips/mips16-pcrel-4.s: New test source.
* testsuite/gas/mips/mips16-pcrel-5.s: New test source.
* testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source.
* testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source.
* testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/mips16-pcrel-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-1.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-03 21:43:10 +02:00
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2017-05-03 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and
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`nomacro' flags.
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(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO):
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New macros.
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(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
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(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
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(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
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(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
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(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
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(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits.
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(RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO)
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(RELAX_MIPS16_CLEAR_MACRO): New macros.
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(append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and
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`mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE.
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(mips16_macro_frag): New function.
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(md_estimate_size_before_relax): Handle HI16/LO16 relaxation.
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(mips_relax_frag): Likewise.
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(md_convert_frag): Likewise.
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* testsuite/gas/mips/mips16@relax-swap3.d: Remove error output,
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add dump patterns.
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* testsuite/gas/mips/mips16e@relax-swap3.d: New test
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subarchitecture.
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* testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing
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NOP padding.
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* testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error
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output, add dump patterns.
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* testsuite/gas/mips/mips16@relax-swap3.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file.
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* testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file.
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* testsuite/gas/mips/relax-swap3.s: Adjust trailing padding.
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* testsuite/gas/mips/mips16-pcrel-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-2.d: New test.
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* testsuite/gas/mips/mips16-pcrel-3.d: New test.
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* testsuite/gas/mips/mips16-pcrel-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-5.d: New test.
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* testsuite/gas/mips/mips16-pcrel-pic-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-pic-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n32-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n32-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n64-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-n64-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-delay-0.d: New test.
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* testsuite/gas/mips/mips16-pcrel-delay-1.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-5.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-6.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-7.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-8.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-9.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test.
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* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New
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test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
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New test.
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* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
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New test.
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* testsuite/gas/mips/mips16-pcrel-0.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-1.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-2.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-3.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-4.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-5.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output.
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* testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr
|
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output.
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* testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr
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output.
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* testsuite/gas/mips/mips16-pcrel-0.s: New test source.
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* testsuite/gas/mips/mips16-pcrel-1.s: New test source.
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* testsuite/gas/mips/mips16-pcrel-2.s: New test source.
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* testsuite/gas/mips/mips16-pcrel-3.s: New test source.
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* testsuite/gas/mips/mips16-pcrel-4.s: New test source.
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|
|
* testsuite/gas/mips/mips16-pcrel-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-05-03 10:52:01 +02:00
|
|
|
|
2017-05-03 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/20941
|
|
|
|
|
|
* symbols.c (snapshot_symbol): Handle the case where
|
|
|
|
|
|
resolve_expression returns a local symbol.
|
|
|
|
|
|
|
2017-05-03 01:05:15 +02:00
|
|
|
|
2017-05-02 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Call `symbol_append' for any
|
|
|
|
|
|
expression symbol created for MIPS16 relaxation.
|
|
|
|
|
|
(match_mips16_insn): Don't encode a constant value as an
|
|
|
|
|
|
immediate with a PC-relative operand.
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-addend-1.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-n32-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-n32-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-addend-n32-1.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-n64-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-n64-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-addend-n64-1.d: New
|
|
|
|
|
|
test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-1.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-pcrel-absolute-1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-1.s: New test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-2.s: New test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-absolute-addend-1.s: New test
|
|
|
|
|
|
source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-04-27 03:25:33 +02:00
|
|
|
|
2017-04-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips16_pcrel_val): New function, factored
|
|
|
|
|
|
out from...
|
|
|
|
|
|
(mips16_extended_frag): ... here.
|
|
|
|
|
|
(md_convert_frag): Use `mips16_pcrel_val' rather than repeated
|
|
|
|
|
|
code in MIPS16 relaxation, with `stretch' hardcoded to 0.
|
|
|
|
|
|
|
2017-04-27 03:13:21 +02:00
|
|
|
|
2017-04-27 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (RELAX_MIPS16_LONG_BRANCH): Rename to...
|
|
|
|
|
|
(RELAX_MIPS16_ALWAYS_EXTENDED): ... this.
|
|
|
|
|
|
(RELAX_MIPS16_MARK_LONG_BRANCH): Rename to...
|
|
|
|
|
|
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED): ... this.
|
|
|
|
|
|
(RELAX_MIPS16_CLEAR_LONG_BRANCH): Rename to...
|
|
|
|
|
|
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): ... this.
|
|
|
|
|
|
(mips16_extended_frag): Adjust accordingly.
|
|
|
|
|
|
|
2017-04-27 04:50:10 +02:00
|
|
|
|
2017-04-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* symbols.c (S_FORCE_RELOC): Separate section and symbol tests.
|
|
|
|
|
|
|
MIPS/GAS: Fix `.option picX' handling with relaxation
Correct the handling of `.option pic0' and `.option pic2' GAS pseudo-ops
in relaxation and use the setting of `mips_pic' (which these directives
control) as at the time a relaxed frag has been created rather than the
final `mips_pic' setting at the end of the source file processed.
To do so record whether `mips_pic' is NO_PIC or not in the frag itself
and use this information throughout relaxation instead of `mips_pic' to
decide which of NO_PIC or SVR4_PIC to produce machine code for, fixing
code generation and removing a possible fatal failure reproducible with:
$ as -32 --relax-branch -o option-pic-relax-3.o option-pic-relax-3.s
option-pic-relax-3.s: Assembler messages:
option-pic-relax-3.s:7: Warning: relaxed out-of-range branch into a jump
option-pic-relax-3.s: Internal error in cvt_frag_to_fill at .../gas/write.c:490.
Please report this bug.
$
using the test source included, due to a buffer overrun in filling the
variable part of a frag.
Likewise use the `fx_tcbit2' flag of a BFD_RELOC_16_PCREL_S2 fixup to
handle the simple case of substituting an out of range unconditional
branch with an equivalent absolute jump in NO_PIC code.
Retain the current way of VXWORKS_PIC use, which commit 41a1578ed17c
("MIPS/GAS: Sanitize `.option picX' pseudo-op") has forbidden the use of
`.option picX' with.
gas/
* config/tc-mips.c (RELAX_ENCODE): Add `PIC' flag.
(RELAX_PIC): New macro.
(RELAX_USE_SECOND, RELAX_SECOND_LONGER, RELAX_NOMACRO)
(RELAX_DELAY_SLOT, RELAX_DELAY_SLOT_16BIT)
(RELAX_DELAY_SLOT_SIZE_FIRST, RELAX_DELAY_SLOT_SIZE_SECOND):
Shift bits.
(RELAX_BRANCH_ENCODE): Add `pic' flag.
(RELAX_BRANCH_UNCOND, RELAX_BRANCH_LIKELY, RELAX_BRANCH_LINK)
(RELAX_BRANCH_TOOFAR): Shift bits.
(RELAX_BRANCH_PIC): New macro.
(RELAX_MICROMIPS_ENCODE): Add `pic' flag.
(RELAX_MICROMIPS_PIC): New macro.
(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_NODS)
(RELAX_MICROMIPS_RELAX32): Shift bits.
(relax_close_frag): Pass `mips_pic' setting to RELAX_ENCODE.
(append_insn): Pass `mips_pic' setting to RELAX_BRANCH_ENCODE
and RELAX_MICROMIPS_ENCODE, and record it in `fx_tcbit2' of the
first fixup created.
(md_apply_fix) <BFD_RELOC_16_PCREL_S2>: Use `fx_tcbit2' of the
fixup processed rather than `mips_pic' in choosing to relax an
out of range branch to a jump.
(relaxed_branch_length): Use the `pic' flag of the relaxed frag
rather than `mips_pic'.
(relaxed_micromips_32bit_branch_length): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_convert_frag): Likewise.
* testsuite/gas/mips/option-pic-relax-0.d: New test.
* testsuite/gas/mips/option-pic-relax-1.d: New test.
* testsuite/gas/mips/option-pic-relax-2.d: New test.
* testsuite/gas/mips/option-pic-relax-3.d: New test.
* testsuite/gas/mips/option-pic-relax-3a.d: New test.
* testsuite/gas/mips/option-pic-relax-4.d: New test.
* testsuite/gas/mips/option-pic-relax-5.d: New test.
* testsuite/gas/mips/option-pic-relax-2.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-3.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-4.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-5.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-0.s: New test source.
* testsuite/gas/mips/option-pic-relax-1.s: New test source.
* testsuite/gas/mips/option-pic-relax-2.s: New test source.
* testsuite/gas/mips/option-pic-relax-3.s: New test source.
* testsuite/gas/mips/option-pic-relax-4.s: New test source.
* testsuite/gas/mips/option-pic-relax-5.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-04-27 01:47:15 +02:00
|
|
|
|
2017-04-26 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (RELAX_ENCODE): Add `PIC' flag.
|
|
|
|
|
|
(RELAX_PIC): New macro.
|
|
|
|
|
|
(RELAX_USE_SECOND, RELAX_SECOND_LONGER, RELAX_NOMACRO)
|
|
|
|
|
|
(RELAX_DELAY_SLOT, RELAX_DELAY_SLOT_16BIT)
|
|
|
|
|
|
(RELAX_DELAY_SLOT_SIZE_FIRST, RELAX_DELAY_SLOT_SIZE_SECOND):
|
|
|
|
|
|
Shift bits.
|
|
|
|
|
|
(RELAX_BRANCH_ENCODE): Add `pic' flag.
|
|
|
|
|
|
(RELAX_BRANCH_UNCOND, RELAX_BRANCH_LIKELY, RELAX_BRANCH_LINK)
|
|
|
|
|
|
(RELAX_BRANCH_TOOFAR): Shift bits.
|
|
|
|
|
|
(RELAX_BRANCH_PIC): New macro.
|
|
|
|
|
|
(RELAX_MICROMIPS_ENCODE): Add `pic' flag.
|
|
|
|
|
|
(RELAX_MICROMIPS_PIC): New macro.
|
|
|
|
|
|
(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
|
|
|
|
|
|
(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_NODS)
|
|
|
|
|
|
(RELAX_MICROMIPS_RELAX32): Shift bits.
|
|
|
|
|
|
(relax_close_frag): Pass `mips_pic' setting to RELAX_ENCODE.
|
|
|
|
|
|
(append_insn): Pass `mips_pic' setting to RELAX_BRANCH_ENCODE
|
|
|
|
|
|
and RELAX_MICROMIPS_ENCODE, and record it in `fx_tcbit2' of the
|
|
|
|
|
|
first fixup created.
|
|
|
|
|
|
(md_apply_fix) <BFD_RELOC_16_PCREL_S2>: Use `fx_tcbit2' of the
|
|
|
|
|
|
fixup processed rather than `mips_pic' in choosing to relax an
|
|
|
|
|
|
out of range branch to a jump.
|
|
|
|
|
|
(relaxed_branch_length): Use the `pic' flag of the relaxed frag
|
|
|
|
|
|
rather than `mips_pic'.
|
|
|
|
|
|
(relaxed_micromips_32bit_branch_length): Likewise.
|
|
|
|
|
|
(md_estimate_size_before_relax): Likewise.
|
|
|
|
|
|
(md_convert_frag): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-0.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-3a.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-4.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-2.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-3.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-4.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-5.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-0.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-3.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/option-pic-relax-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-04-25 17:07:00 +02:00
|
|
|
|
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arc/leave_enter.d: Update test.
|
|
|
|
|
|
* testsuite/gas/arc/leave_enter.s: Likewise.
|
|
|
|
|
|
|
2017-04-25 17:07:00 +02:00
|
|
|
|
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arc/b.d: Update test.
|
|
|
|
|
|
* testsuite/gas/arc/noargs_hs.d: Likewise.
|
|
|
|
|
|
|
2017-04-25 11:20:14 +02:00
|
|
|
|
2017-04-25 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Correct
|
|
|
|
|
|
BFD_RELOC_MIPS16_16_PCREL_S1 fixup size.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-addend-4.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-addend-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-addend-5.l: New stderr
|
|
|
|
|
|
output.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-addend-4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips16-branch-addend-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-04-25 11:40:43 +02:00
|
|
|
|
2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21407
|
|
|
|
|
|
* config/tc-sparc.c (md_apply_fix): Do not transform `call'
|
|
|
|
|
|
instructions into branch instructions in fixups generating
|
|
|
|
|
|
additional relocations.
|
|
|
|
|
|
* testsuite/gas/sparc/call-relax.s: New file.
|
|
|
|
|
|
* testsuite/gas/sparc/call-relax.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/call-relax-aout.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
|
|
|
|
|
|
|
2017-04-24 15:49:48 +02:00
|
|
|
|
2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS.
|
|
|
|
|
|
Forbid MOV.W and MOVW if destination is SP or PC.
|
|
|
|
|
|
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain
|
|
|
|
|
|
expectation of LDR not generating a MOVS for low registers and small
|
|
|
|
|
|
constants. Add tests of MOVW generation.
|
|
|
|
|
|
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update
|
|
|
|
|
|
expected disassembly.
|
|
|
|
|
|
|
2017-04-22 06:39:21 +02:00
|
|
|
|
2017-04-22 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/vle.s: Format. Add se_rfgi and e_sc.
|
|
|
|
|
|
* testsuite/gas/ppc/vle.d: Update.
|
|
|
|
|
|
|
2017-04-21 13:18:06 +02:00
|
|
|
|
2017-04-21 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/21380
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-3.s: New file.
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-3.d: New file.
|
|
|
|
|
|
|
2017-04-11 00:10:24 +02:00
|
|
|
|
2017-04-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_show_usage): Delete mention of -mhtm.
|
|
|
|
|
|
* testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8.
|
|
|
|
|
|
|
2017-04-10 14:12:52 +02:00
|
|
|
|
2017-04-10 Max Filippov <jcmvbkbc@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag):
|
|
|
|
|
|
Initialize lps->frag_count with auto_litpool_limit.
|
|
|
|
|
|
(xg_promote_candidate_litpool): New function.
|
|
|
|
|
|
(xtensa_move_literals): Extract candidate litpool promotion code
|
|
|
|
|
|
into separate function. Call it for all possible found
|
|
|
|
|
|
candidates.
|
|
|
|
|
|
(xtensa_switch_to_literal_fragment): Drop 'recursive' flag and
|
|
|
|
|
|
call to xtensa_mark_literal_pool_location that it guards.
|
|
|
|
|
|
Replace it with call to xtensa_maybe_create_literal_pool_frag.
|
|
|
|
|
|
Initialize pool_location with created literal pool candidate.
|
|
|
|
|
|
* testsuite/gas/xtensa/all.exp: Add new tests.
|
|
|
|
|
|
* testsuite/gas/xtensa/auto-litpools-first1.d: New test results.
|
|
|
|
|
|
* testsuite/gas/xtensa/auto-litpools-first1.s: New test.
|
|
|
|
|
|
* testsuite/gas/xtensa/auto-litpools-first2.d: New test results.
|
|
|
|
|
|
* testsuite/gas/xtensa/auto-litpools-first2.s: New test.
|
|
|
|
|
|
* testsuite/gas/xtensa/auto-litpools.d: Fix offsets changed due
|
|
|
|
|
|
to additional jump instruction.
|
|
|
|
|
|
|
Remove E6500 insns from PPC_OPCODE_ALTIVEC2
This isn't losing anything from the testsuite. All of these insns
appear in testsuite/gas/ppc/e6500.s
opcodes/
* ppc-opc.c (powerpc_opcodes <mviwsplt, mvidsplt, lvexbx, lvepxl,
lvexhx, lvepx, lvexwx, stvexbx, stvexhx, stvexwx, lvtrx, lvtlx,
lvswx, stvfrx, stvflx, stvswx, lvsm, stvepxl, lvtrxl, stvepx,
lvtlxl, lvswxl, stvfrxl, stvflxl, stvswxl>): Enable E6500 only
vector instructions with E6500 not PPCVEC2.
gas/
* testsuite/gas/ppc/altivec2.s: Delete E6500 vector insns.
* testsuite/gas/ppc/altivec2.d: Adjust to suit.
2017-04-07 10:33:46 +02:00
|
|
|
|
2017-04-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/altivec2.s: Delete E6500 vector insns.
|
|
|
|
|
|
* testsuite/gas/ppc/altivec2.d: Adjust to suit.
|
|
|
|
|
|
|
2017-04-07 10:28:37 +02:00
|
|
|
|
2017-04-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/section12a.d: Don't expect alignment of 1
|
|
|
|
|
|
for .mbind.text.
|
|
|
|
|
|
|
2017-04-06 18:17:15 +02:00
|
|
|
|
2017-04-06 Pip Cet <pipcet@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler
|
|
|
|
|
|
changes.
|
|
|
|
|
|
* testsuite/gas/wasm32/disass.d: New test.
|
|
|
|
|
|
* testsuite/gas/wasm32/disass.s: New test.
|
|
|
|
|
|
* testsuite/gas/wasm32/disass-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/wasm32/disass-2.s: New test.
|
|
|
|
|
|
* testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc
|
|
|
|
|
|
names.
|
|
|
|
|
|
* testsuite/gas/wasm32/reloc.s: Update test for changed assembler
|
|
|
|
|
|
syntax.
|
|
|
|
|
|
* testsuite/gas/wasm32/wasm32.exp: Run new tests. Expect allinsn
|
|
|
|
|
|
test to succeed.
|
|
|
|
|
|
|
Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX
Mark an ALLOC section, which should be placed in special memory area,
with SHF_GNU_MBIND. Its sh_info field indicates the special memory
type. GNU_MBIND section names start with ".mbind" so that they are
placed as orphan sections by linker. All input GNU_MBIND sections
with the same sh_type, sh_flags and sh_info are placed in one output
GNU_MBIND section. In executable and shared object, create a
GNU_MBIND segment for each GNU_MBIND section and its segment type is
PT_GNU_MBIND_LO plus the sh_info value. Each GNU_MBIND segment is
aligned at page boundary.
The assembler syntax:
.section .mbind.foo,"adx",%progbits
^ 0: Special memory type.
|
'd' for SHF_GNU_MBIND.
.section .mbind.foo,"adx",%progbits,0x1
^ 1: Special memory type.
|
'd' for SHF_GNU_MBIND.
.section .mbind.bar,"adG",%progbits,.foo_group,comdat,0x2
^ 2: Special memory type.
|
'd' for SHF_GNU_MBIND.
bfd/
* elf.c (get_program_header_size): Add a GNU_MBIND segment for
each GNU_MBIND section and align GNU_MBIND section to page size.
(_bfd_elf_map_sections_to_segments): Create a GNU_MBIND
segment for each GNU_MBIND section.
(_bfd_elf_init_private_section_data): Copy sh_info from input
for GNU_MBIND section.
binutils/
* NEWS: Mention support for ELF SHF_GNU_MBIND and
PT_GNU_MBIND_XXX.
* readelf.c (get_segment_type): Handle PT_GNU_MBIND_XXX.
(get_elf_section_flags): Handle SHF_GNU_MBIND.
(process_section_headers): Likewise.
* testsuite/binutils-all/mbind1.s: New file.
* testsuite/binutils-all/objcopy.exp: Run readelf test on
mbind1.s.
gas/
* NEWS: Mention support for ELF SHF_GNU_MBIND.
* config/obj-elf.c (section_match): New.
(get_section): Match both sh_info and group name.
(obj_elf_change_section): Add argument for sh_info. Pass both
sh_info and group name to get_section. Issue an error for
SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info.
(obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'.
(obj_elf_section): Support SHF_GNU_MBIND section info.
* config/obj-elf.h (obj_elf_change_section): Add argument for
sh_info.
* config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to
obj_elf_change_section.
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
* config/tc-microblaze.c (microblaze_s_data): Likewise.
(microblaze_s_sdata): Likewise.
(microblaze_s_rdata): Likewise.
(microblaze_s_bss): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-msp430.c (msp430_profiler): Likewise.
* config/tc-rx.c (parse_rx_section): Likewise.
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
* doc/as.texinfo: Document 'd' for SHF_GNU_MBIND.
* testsuite/gas/elf/elf.exp: Run section12a, section12b and
section13.
* testsuite/gas/elf/section10.d: Updated.
* testsuite/gas/elf/section10.s: Likewise.
* testsuite/gas/elf/section12.s: New file.
* testsuite/gas/elf/section12a.d: Likewise.
* testsuite/gas/elf/section12b.d: Likewise.
* testsuite/gas/elf/section13.l: Likewise.
* testsuite/gas/elf/section13.d: Likewise.
* testsuite/gas/elf/section13.s: Likewise.
include/
* elf/common.h (PT_GNU_MBIND_NUM): New.
(PT_GNU_MBIND_LO): Likewise.
(PT_GNU_MBIND_HI): Likewise.
(SHF_GNU_MBIND): Likewise.
ld/
* NEWS: Mention support for ELF SHF_GNU_MBIND and
PT_GNU_MBIND_XXX.
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Place
input GNU_MBIND sections with the same type, attributes and
sh_info field into a single output GNU_MBIND section.
* testsuite/ld-elf/elf.exp: Run mbind2a and mbind2b.
* testsuite/ld-elf/mbind1.s: New file.
* testsuite/ld-elf/mbind1a.d: Likewise.
* testsuite/ld-elf/mbind1b.d: Likewise.
* testsuite/ld-elf/mbind1c.d: Likewise.
* testsuite/ld-elf/mbind2a.s: Likewise.
* testsuite/ld-elf/mbind2b.c: Likewise.
2017-04-04 18:05:48 +02:00
|
|
|
|
2017-04-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention support for ELF SHF_GNU_MBIND.
|
|
|
|
|
|
* config/obj-elf.c (section_match): New.
|
|
|
|
|
|
(get_section): Match both sh_info and group name.
|
|
|
|
|
|
(obj_elf_change_section): Add argument for sh_info. Pass both
|
|
|
|
|
|
sh_info and group name to get_section. Issue an error for
|
|
|
|
|
|
SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info.
|
|
|
|
|
|
(obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'.
|
|
|
|
|
|
(obj_elf_section): Support SHF_GNU_MBIND section info.
|
|
|
|
|
|
* config/obj-elf.h (obj_elf_change_section): Add argument for
|
|
|
|
|
|
sh_info.
|
|
|
|
|
|
* config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to
|
|
|
|
|
|
obj_elf_change_section.
|
|
|
|
|
|
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
|
|
|
|
|
|
* config/tc-microblaze.c (microblaze_s_data): Likewise.
|
|
|
|
|
|
(microblaze_s_sdata): Likewise.
|
|
|
|
|
|
(microblaze_s_rdata): Likewise.
|
|
|
|
|
|
(microblaze_s_bss): Likewise.
|
|
|
|
|
|
* config/tc-mips.c (s_change_section): Likewise.
|
|
|
|
|
|
* config/tc-msp430.c (msp430_profiler): Likewise.
|
|
|
|
|
|
* config/tc-rx.c (parse_rx_section): Likewise.
|
|
|
|
|
|
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
|
|
|
|
|
|
* doc/as.texinfo: Document 'd' for SHF_GNU_MBIND.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run section12a, section12b and
|
|
|
|
|
|
section13.
|
|
|
|
|
|
* testsuite/gas/elf/section10.d: Updated.
|
|
|
|
|
|
* testsuite/gas/elf/section10.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section12.s: New file.
|
|
|
|
|
|
* testsuite/gas/elf/section12a.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section12b.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section13.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section13.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section13.s: Likewise.
|
|
|
|
|
|
|
2017-04-03 18:03:57 +02:00
|
|
|
|
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_clear_subsets): Cast argument to free to
|
|
|
|
|
|
avoid const warnings.
|
|
|
|
|
|
|
2017-03-30 01:05:40 +02:00
|
|
|
|
2017-03-30 Palmer Dabbelt <palmer@dabbelt.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_clear_subsets): New function.
|
|
|
|
|
|
(riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to
|
|
|
|
|
|
clear RVC when it's been previously set.
|
|
|
|
|
|
|
2017-03-31 13:54:38 +02:00
|
|
|
|
2017-03-31 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21333
|
|
|
|
|
|
* config/tc-s390.c (tc_s390_fix_adjustable): Allow non pc-relative
|
|
|
|
|
|
fixups in mergeable sections to be adjusted.
|
|
|
|
|
|
|
2017-03-30 11:57:21 +02:00
|
|
|
|
2017-03-30 Pip Cet <pipcet@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
|
|
|
|
|
|
* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
|
|
|
|
|
|
* Makefile.am: Add WebAssembly assembler target.
|
|
|
|
|
|
* configure.tgt: Add WebAssembly assembler target.
|
|
|
|
|
|
* doc/c-wasm32.texi: New file: Start documenting WebAssembly
|
|
|
|
|
|
assembler.
|
|
|
|
|
|
* doc/all.texi: Define WASM32.
|
|
|
|
|
|
* doc/as.texinfo: Add WebAssembly entries.
|
|
|
|
|
|
* NEWS: Mention the new support.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/gas.pot: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
* testsuite/gas/wasm32: New directory.
|
|
|
|
|
|
* testsuite/gas/wasm32/allinsn.d: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/allinsn.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-2.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-2.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-3.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-3.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-4.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-4.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-5.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-5.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-6.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-6.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-7.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-7.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-8.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-8.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-9.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-9.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-10.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-10.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-11.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-11.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-12.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-12.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-13.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-13.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-14.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-14.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-15.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-15.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-16.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-16.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-17.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-17.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-18.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-18.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-19.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-19.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-20.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-20.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-21.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-21.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-22.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-22.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-24.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-24.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-25.l: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/illegal-25.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/reloc.d: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/reloc.s: New file.
|
|
|
|
|
|
* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
|
|
|
|
|
|
architecture.
|
|
|
|
|
|
|
2017-03-29 05:13:06 +02:00
|
|
|
|
2017-03-29 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_parse_option): Reject -mraw.
|
|
|
|
|
|
|
2017-03-26 23:49:48 +02:00
|
|
|
|
2017-03-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21303
|
|
|
|
|
|
* testsuite/gas/ppc/pr21303.d,
|
|
|
|
|
|
* testsuite/gas/ppc/pr21303.s: New test
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run it.
|
|
|
|
|
|
|
Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.
opcodes * arc-nps400-tbl.h: Add Ultra Ip and Miscellaneous instructions format.
* arc-opc.c: Add defines. e.g. F_NJ, F_NM , F_NO_T, F_NPS_SR, F_NPS_M, F_NPS_CORE, F_NPS_ALL.
(insert_nps_misc_imm_offset): New function.
(extract_nps_misc imm_offset): New function.
(arc_num_flag_operands): Add F_NJ, F_NM, F_NO_T.
(arc_flag_special_cases): Add F_NJ, F_NM, F_NO_T.
include * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
gas * testsuite/gas/arc/nps400-12.s: New file.
* testsuite/gas/arc/nps400-12.d: New file.
2017-03-27 12:14:30 +02:00
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2017-03-27 Rinat Zelig <rinat@mellanox.com>
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* testsuite/gas/arc/nps400-12.s: New file.
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* testsuite/gas/arc/nps400-12.d: New file.
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2017-03-24 14:22:16 +01:00
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2017-03-24 Thomas preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.: (md_begin): Set selected_cpu from *mcpu_cpu_opt when
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CPU_DEFAULT is defined.
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2017-03-21 16:36:44 +01:00
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2017-03-21 Palmer Dabbbelt <palmer@dabbelt.com>
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* config/tc-riscv.c (md_show_usage): Remode defuct -m32, -m64,
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-msoft-float, -mhard-float, -mno-rvc, and -mrvc options; and don't
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print an invalid default ISA string.
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* doc/c-riscv.texi (OPTIONS): Add -fpic and -fno-pic options.
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2017-03-22 18:19:14 +01:00
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2017-03-22 Max Filippov <jcmvbkbc@gmail.com>
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* config/tc-xtensa.c (xtensa_relax_frag): Change fx_size of the
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reassigned fixup to size of jump instruction (3) and fx_r_type
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to BFD_RELOC_XTENSA_SLOT0_OP, as there's only one slot.
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(add_jump_to_trampoline): Search
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origfrag->tc_frag_data.slot_symbols for the slot with non-NULL
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symbol and use that slot instead of slot 0.
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2017-03-21 14:21:02 +01:00
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2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2
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from cpu_table. Remove vx2, and novx2 from cpu_flags.
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2017-03-21 12:37:33 +01:00
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2017-03-21 Rinat Zelig <rinat@mellanox.com>
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* testsuite/gas/arc/nps400-11.s: New file.
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* testsuite/gas/arc/nps400-11.d: New file.
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2017-03-20 17:57:07 +01:00
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2017-03-20 Nick Clifton <nickc@redhat.com>
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* doc/as.texinfo (2byte): Note that if no expressions are present
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the directive does nothing. Emphasize that the output is
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unaligned, and that this can have an effect on the relocations
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generated.
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(4byte): Simplify description. Refer back to the 2byte
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description.
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(8byte): Likewise.
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2017-03-20 15:56:22 +01:00
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2017-03-20 Richard Earnshaw <rearnsha@arm.com>
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* config/tc-arm.c (arm_fpus): Note entires that should not be
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documented.
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* doc/c-arm.texi (-mfpu): Add missing FPU entries for neon-vfpv3 and
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neon-fp16. Fix spelling error.
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2017-03-20 11:03:15 +01:00
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2017-03-20 Richard Earnshaw <rearnsha@arm.com>
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* config/tc-arm.c (arm_fpus): Add neon-vfpv3 as an alias for neon.
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2017-03-16 11:05:22 +01:00
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2017-03-16 Rinat Zelig <rinat@mellanox.com>
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* config/tc-arc.c (assemble_insn): Only handle ".t" and ".nt"
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specially for ARCv2.
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2017-03-07 11:15:02 +01:00
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2017-03-14 Kito Cheng <kito.cheng@gmail.com>
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* config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate
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encoding format, which can accept 0-valued immediates.
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(riscv_ip): Likewise.
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2017-03-15 10:19:42 +01:00
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2017-03-15 Nick Clifton <nickc@redhat.com>
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* config/tc-riscv.c (riscv_pre_output_hook): Fix compile time
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warning about discarding a const qualifier.
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2017-03-02 07:54:32 +01:00
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2017-03-02 Kuan-Lin Chen <rufus@andestech.com>
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* config/tc-riscv.h (HWARD2_USE_FIXED_ADVANCE_PC): New define.
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2017-02-10 07:58:52 +01:00
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2017-03-02 Kuan-Lin Chen <rufus@andestech.com>
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* config/tc-riscv.c (md_apply_fix): Set fx_frag and
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fx_next->fx_frag for CFA_advance_loc relocations.
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2017-02-02 08:27:18 +01:00
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2017-03-02 Kuan-Lin Chen <rufus@andestech.com>
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* config/tc-riscv.c (md_apply_fix): Compute the correct offsets
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for CFA relocations.
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2017-03-13 10:58:04 +01:00
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2017-03-13 Nick Clifton <nickc@redhat.com>
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PR binutils/21202
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* config/tc-aarch64.c (reloc_table): Rename
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BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to
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BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname
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BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to
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BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
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(md_apply_fix): Likewise.
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(aarch64_force_relocation): Likewise.
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* testsuite/gas/aarch64/tls.d: Update regexp.
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2017-03-10 16:42:04 +01:00
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2017-03-10 Tobin C. Harding <me@tobin.cc>
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Nick Clifton <nickc@redhat.com>
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* doc/as.texinfo (2byte): Tidy up wording. Add note that
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overlarge values will produce a warning message and be trunacted.
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(4byte): Likewise.
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X86: Add pseudo prefixes to control encoding
Many x86 instructions have more than one encodings. Assembler picks
the default one, usually the shortest one. Although the ".s", ".d8"
and ".d32" suffixes can be used to swap register operands or specify
displacement size, they aren't very flexible. This patch adds pseudo
prefixes, {xxx}, to control instruction encoding. The available
pseudo prefixes are {disp8}, {disp32}, {load}, {store}, {vex2}, {vex3}
and {evex}. Pseudo prefixes are preferred over the ".s", ".d8" and
".d32" suffixes, which are deprecated.
gas/
* config/tc-i386.c (_i386_insn): Add dir_encoding and
vec_encoding. Remove swap_operand and need_vrex.
(extra_symbol_chars): Add '}'.
(md_begin): Mark '}' with LEX_BEGIN_NAME. Allow '}' in
mnemonic.
(build_vex_prefix): Don't use 2-byte VEX encoding with
{vex3}. Check dir_encoding and load.
(parse_insn): Check pseudo prefixes. Set dir_encoding.
(VEX_check_operands): Likewise.
(match_template): Check dir_encoding and load.
(parse_real_register): Set vec_encoding instead of need_vrex.
(parse_register): Likewise.
* doc/c-i386.texi: Document {disp8}, {disp32}, {load}, {store},
{vex2}, {vex3} and {evex}. Remove ".s", ".d8" and ".d32"
* testsuite/gas/i386/i386.exp: Run pseudos and x86-64-pseudos.
* testsuite/gas/i386/pseudos.d: New file.
* testsuite/gas/i386/pseudos.s: Likewise.
* testsuite/gas/i386/x86-64-pseudos.d: Likewise.
* testsuite/gas/i386/x86-64-pseudos.s: Likewise.
opcodes/
* i386-gen.c (opcode_modifiers): Replace S with Load.
* i386-opc.h (S): Removed.
(Load): New.
(i386_opcode_modifier): Replace s with load.
* i386-opc.tbl: Add {disp8}, {disp32}, {swap}, {vex2}, {vex3}
and {evex}. Replace S with Load.
* i386-tbl.h: Regenerated.
2017-03-09 18:58:46 +01:00
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2017-03-09 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (_i386_insn): Add dir_encoding and
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vec_encoding. Remove swap_operand and need_vrex.
|
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(extra_symbol_chars): Add '}'.
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(md_begin): Mark '}' with LEX_BEGIN_NAME. Allow '}' in
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mnemonic.
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(build_vex_prefix): Don't use 2-byte VEX encoding with
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{vex3}. Check dir_encoding and load.
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(parse_insn): Check pseudo prefixes. Set dir_encoding.
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(VEX_check_operands): Likewise.
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(match_template): Check dir_encoding and load.
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(parse_real_register): Set vec_encoding instead of need_vrex.
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(parse_register): Likewise.
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* doc/c-i386.texi: Document {disp8}, {disp32}, {load}, {store},
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{vex2}, {vex3} and {evex}. Remove ".s", ".d8" and ".d32"
|
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* testsuite/gas/i386/i386.exp: Run pseudos and x86-64-pseudos.
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* testsuite/gas/i386/pseudos.d: New file.
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* testsuite/gas/i386/pseudos.s: Likewise.
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* testsuite/gas/i386/x86-64-pseudos.d: Likewise.
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* testsuite/gas/i386/x86-64-pseudos.s: Likewise.
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2017-03-09 03:49:03 +01:00
|
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2017-03-08 Peter Bergner <bergner@vnet.ibm.com>
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* testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option.
|
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(objdump): Use the -Mpower8 option.
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2017-03-08 21:00:42 +01:00
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2017-03-08 Peter Bergner <bergner@vnet.ibm.com>
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* testsuite/gas/ppc/power9.d <lnia> New test.
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* testsuite/gas/ppc/power9.s: Likewise.
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2017-03-07 10:09:32 +01:00
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2017-03-07 Alan Modra <amodra@gmail.com>
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* doc/as.texinfo (2byte, 4byte, 8byte): Correct @section placement.
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2017-03-07 07:16:36 +01:00
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2017-03-07 Tobin C. Harding <me@tobin.cc>
|
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Alan Modra <amodra@gmail.com>
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* doc/as.texinfo (2byte, 4byte, 8byte): Document.
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* doc/c-arm.texi (2byte, 4byte, 8byte): Omit if ELF.
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2017-03-07 00:26:37 +01:00
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2017-03-06 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (cpu_arch): Add .cet.
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* doc/c-i386.texi: Document cet.
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* testsuite/gas/i386/cet-intel.d: New file.
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* testsuite/gas/i386/cet.d: Likewise.
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* testsuite/gas/i386/cet.s: Likewise.
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* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
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* testsuite/gas/i386/x86-64-cet.d: Likewise.
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* testsuite/gas/i386/x86-64-cet.s: Likewise.
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* testsuite/gas/i386/i386.exp: Run Intel CET tests.
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2017-03-07 00:00:52 +01:00
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2017-03-06 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/gas/i386/x86-64-mpx-inval-2.s: Force a good alignment.
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* testsuite/gas/i386/x86-64-mpx-inval-2.l: Expect [0-9A-F]+.
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2017-03-05 13:55:16 +01:00
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|
2017-03-06 Alan Modra <amodra@gmail.com>
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* dw2gencfi.c (encoding_size): Return unsigned int.
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(emit_expr_encoded): Assert size matches reloc bitsize.
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(output_fde): Use unsigned for offset_size and addr_size. Set
|
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addr_size earlier and use in place of constant 4 and uses of
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DWARF2_FDE_RELOC_SIZE. Assert it matches reloc bitsize.
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2017-03-05 13:25:29 +01:00
|
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|
2017-03-06 Alan Modra <amodra@gmail.com>
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* dw2gencfi.c: Wrap overlong lines. Add parens for emacs
|
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auto reformat. Formatting and whitespace fixes.
|
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|
2017-03-05 23:37:54 +01:00
|
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|
2017-03-05 Mark Wielaard <mark@klomp.org>
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* dwarf2dbg.c (out_debug_abbrev): Use DW_FORM_strp instead of
|
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|
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DW_FORM_string for DW_AT_name, DW_AT_comp_dir and DW_AT_producer.
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(out_debug_info): Accept symbols to name, comp_dir and producer in
|
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the .debug_str section and emit those offsets not full strings.
|
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(out_debug_str): New function that outputs the strings for name,
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|
|
comp_dir and producer in .debug_str and generates symbols to those
|
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strings.
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(out_debug_line): Create a .debug_str section if necessary and call
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out_debug_str before calling out_debug_info.
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|
* testsuite/gas/aarch64/dwarf.d: Add extra section symbol to expected
|
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output.
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|
GAS: Fix bogus "attempt to move .org backwards" relaxation errors
Fix a commit 6afe8e98a664 ("internal error for backwards .org"),
<https://www.sourceware.org/ml/binutils/2008-06/msg00212.html>,
GAS regression that caused legitimate code to fail assembly with an
"attempt to move .org backwards" error.
For example with the `mips-linux' target we get:
$ cat org.s
.set mips16
la $2, foo
.org 0x1000
.align 2
foo:
.half 0
$ as -o org.o org.s
org.s: Assembler messages:
org.s:3: Error: attempt to move .org backwards
$
where the location pointer is obviously not moved backwards with `.org'.
The cause is positive `stretch' in relaxation due to a PC-relative ADDIU
instruction (produced from the LA macro used) getting expanded from 2 to
4 bytes as `foo' is noticed to be out of range for the short encoding.
This in turn triggers logic in `relax_segment' which concludes in the
processing of an `rs_org' frag produced that the location pointer is
moved backwards while in fact only the amount to space forward to the
location requested has shrunk, resulting in a negative growth of the
frag.
Correct the bad logic then and instead verify that the fixed part of an
`rs_org' frag has not overrun the location requested, as per the comment
already included with the error message:
/* Growth may be negative, but variable part of frag
cannot have fewer than 0 chars. That is, we can't
.org backwards. */
which accurately describes the regression scenario. Move the comment
ahead the conditional noted, for clarity.
Add generic and MIPS test cases for the `.org' pseudo-op, including the
test case discussed though not integrated with the offending commit in
particular, adjusted to work across all targets.
gas/
* write.c (relax_segment) <rs_org>: Only bail out if the fixed
part of the frag has overrun the location requested.
* testsuite/gas/all/org-1.d: New test.
* testsuite/gas/all/org-2.d: New test.
* testsuite/gas/all/org-3.d: New test.
* testsuite/gas/all/org-4.d: New test.
* testsuite/gas/all/org-5.d: New test.
* testsuite/gas/all/org-6.d: New test.
* testsuite/gas/all/org-1.l: New stderr output.
* testsuite/gas/all/org-2.l: New stderr output.
* testsuite/gas/all/org-3.l: New stderr output.
* testsuite/gas/all/org-1.s: New test source.
* testsuite/gas/all/org-2.s: New test source.
* testsuite/gas/all/org-3.s: New test source.
* testsuite/gas/all/org-4.s: New test source.
* testsuite/gas/all/org-5.s: New test source.
* testsuite/gas/all/org-6.s: New test source.
* testsuite/gas/all/gas.exp: Run the new tests.
* testsuite/gas/mips/org-1.d: New test.
* testsuite/gas/mips/org-2.d: New test.
* testsuite/gas/mips/org-3.d: New test.
* testsuite/gas/mips/org-4.d: New test.
* testsuite/gas/mips/org-5.d: New test.
* testsuite/gas/mips/org-6.d: New test.
* testsuite/gas/mips/org-7.d: New test.
* testsuite/gas/mips/org-8.d: New test.
* testsuite/gas/mips/org-9.d: New test.
* testsuite/gas/mips/org-10.d: New test.
* testsuite/gas/mips/org-11.d: New test.
* testsuite/gas/mips/org-12.d: New test.
* testsuite/gas/mips/org-1.l: New stderr output.
* testsuite/gas/mips/org-4.l: New stderr output.
* testsuite/gas/mips/org-5.l: New stderr output.
* testsuite/gas/mips/org-6.l: New stderr output.
* testsuite/gas/mips/org-10.l: New stderr output.
* testsuite/gas/mips/org-1.s: New test source.
* testsuite/gas/mips/org-2.s: New test source.
* testsuite/gas/mips/org-3.s: New test source.
* testsuite/gas/mips/org-4.s: New test source.
* testsuite/gas/mips/org-5.s: New test source.
* testsuite/gas/mips/org-6.s: New test source.
* testsuite/gas/mips/org-7.s: New test source.
* testsuite/gas/mips/org-8.s: New test source.
* testsuite/gas/mips/org-9.s: New test source.
* testsuite/gas/mips/org-10.s: New test source.
* testsuite/gas/mips/org-11.s: New test source.
* testsuite/gas/mips/org-12.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-03-02 02:24:15 +01:00
|
|
|
|
2017-03-02 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (relax_segment) <rs_org>: Only bail out if the fixed
|
|
|
|
|
|
part of the frag has overrun the location requested.
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/org-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-4.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/all/org-1.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/all/org-2.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/all/org-3.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/all/org-1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/org-2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/org-3.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/org-4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/org-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/org-6.s: New test source.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run the new tests.
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/org-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-4.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-5.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-6.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-8.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-9.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-10.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-11.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-12.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/org-1.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/org-4.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/org-5.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/org-6.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/org-10.l: New stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/org-1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-3.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-5.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-6.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-7.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-8.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-9.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-10.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-11.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/org-12.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-03-01 15:51:13 +01:00
|
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|
|
2017-03-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
|
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|
|
|
|
|
|
|
|
|
* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
|
|
|
|
|
|
|
2017-02-28 10:53:35 +01:00
|
|
|
|
2017-02-28 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx.s: Add suffixed variants of
|
|
|
|
|
|
VPCMPESTR{I,M}.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse2avx.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse4_2.s: Add suffixed variants
|
|
|
|
|
|
of PCMPESTR{I,M}.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse4_2-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse4_2.d: Likewise.
|
|
|
|
|
|
|
2017-02-28 01:08:51 +01:00
|
|
|
|
2017-02-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
|
|
|
|
|
|
|
2017-02-27 23:02:36 +01:00
|
|
|
|
2017-02-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
|
|
|
|
|
|
(md_apply_fix): Remove fx_subsy check. Move code converting to
|
|
|
|
|
|
pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code
|
|
|
|
|
|
emiiting errors on seeing fx_pcrel set on unexpected relocs, as
|
|
|
|
|
|
that is done now by the generic code via..
|
|
|
|
|
|
* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
|
|
|
|
|
|
(TC_VALIDATE_FIX_SUB): Define.
|
|
|
|
|
|
|
2017-02-28 01:14:08 +01:00
|
|
|
|
2017-02-28 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions.
|
|
|
|
|
|
* testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6
|
|
|
|
|
|
encoding patterns.
|
|
|
|
|
|
* testsuite/gas/mips/jalr4-n64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@jalr4.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@jalr4-n32.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@jalr4-n64.d: New test.
|
|
|
|
|
|
|
2017-02-24 14:32:27 +01:00
|
|
|
|
2017-02-25 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/strtab.s: Don't put directives on first
|
|
|
|
|
|
column or continuation with labels not in first column.
|
|
|
|
|
|
|
[AArch64] Additional SVE instructions
This patch supports some additions to the SVE architecture prior to
its public release.
include/
* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
(AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
(AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
(AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
opcodes/
* aarch64-tbl.h (OP_SVE_HMH, OP_SVE_VMU_HSD, OP_SVE_VMVU_HSD)
(OP_SVE_VMVV_HSD, OP_SVE_VMVVU_HSD, OP_SVE_VM_HSD, OP_SVE_VUVV_HSD)
(OP_SVE_VUV_HSD, OP_SVE_VU_HSD, OP_SVE_VVVU_H, OP_SVE_VVVU_S)
(OP_SVE_VVVU_HSD, OP_SVE_VVV_D, OP_SVE_VVV_D_H, OP_SVE_VVV_H)
(OP_SVE_VVV_HSD, OP_SVE_VVV_S, OP_SVE_VVV_S_B, OP_SVE_VVV_SD_BH)
(OP_SVE_VV_BHSDQ, OP_SVE_VV_HSD, OP_SVE_VZVV_HSD, OP_SVE_VZV_HSD)
(OP_SVE_V_HSD): New macros.
(OP_SVE_VMU_SD, OP_SVE_VMVU_SD, OP_SVE_VM_SD, OP_SVE_VUVV_SD)
(OP_SVE_VU_SD, OP_SVE_VVVU_SD, OP_SVE_VVV_SD, OP_SVE_VZVV_SD)
(OP_SVE_VZV_SD, OP_SVE_V_SD): Delete.
(aarch64_opcode_table): Add new SVE instructions.
(aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate
for rotation operands. Add new SVE operands.
* aarch64-asm.h (ins_sve_addr_ri_s4): New inserter.
(ins_sve_quad_index): Likewise.
(ins_imm_rotate): Split into...
(ins_imm_rotate1, ins_imm_rotate2): ...these two inserters.
* aarch64-asm.c (aarch64_ins_imm_rotate): Split into...
(aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2): ...these two
functions.
(aarch64_ins_sve_addr_ri_s4): New function.
(aarch64_ins_sve_quad_index): Likewise.
(do_misc_encoding): Handle "MOV Zn.Q, Qm".
* aarch64-asm-2.c: Regenerate.
* aarch64-dis.h (ext_sve_addr_ri_s4): New extractor.
(ext_sve_quad_index): Likewise.
(ext_imm_rotate): Split into...
(ext_imm_rotate1, ext_imm_rotate2): ...these two extractors.
* aarch64-dis.c (aarch64_ext_imm_rotate): Split into...
(aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2): ...these two
functions.
(aarch64_ext_sve_addr_ri_s4): New function.
(aarch64_ext_sve_quad_index): Likewise.
(aarch64_ext_sve_index): Allow quad indices.
(do_misc_decoding): Likewise.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc.h (FLD_SVE_i3h, FLD_SVE_rot1, FLD_SVE_rot2): New
aarch64_field_kinds.
(OPD_F_OD_MASK): Widen by one bit.
(OPD_F_NO_ZR): Bump accordingly.
(get_operand_field_width): New function.
* aarch64-opc.c (fields): Add new SVE fields.
(operand_general_constraint_met_p): Handle new SVE operands.
(aarch64_print_operand): Likewise.
* aarch64-opc-2.c: Regenerate.
gas/
* doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
* config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
to be used with SVE registers.
(parse_operands): Handle new SVE operands.
(aarch64_features): Make "sve" require F16 rather than FP. Also
require COMPNUM.
* testsuite/gas/aarch64/sve.s: Add tests for new instructions.
Include compnum tests.
* testsuite/gas/aarch64/sve.d: Update accordingly.
* testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
* testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
update expected output for new FMOV and MOV alternatives.
2017-02-24 19:29:00 +01:00
|
|
|
|
2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
|
|
|
|
|
|
* config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
|
|
|
|
|
|
to be used with SVE registers.
|
|
|
|
|
|
(parse_operands): Handle new SVE operands.
|
|
|
|
|
|
(aarch64_features): Make "sve" require F16 rather than FP. Also
|
|
|
|
|
|
require COMPNUM.
|
|
|
|
|
|
* testsuite/gas/aarch64/sve.s: Add tests for new instructions.
|
|
|
|
|
|
Include compnum tests.
|
|
|
|
|
|
* testsuite/gas/aarch64/sve.d: Update accordingly.
|
|
|
|
|
|
* testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
|
|
|
|
|
|
* testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
|
|
|
|
|
|
update expected output for new FMOV and MOV alternatives.
|
|
|
|
|
|
|
2017-02-24 19:27:26 +01:00
|
|
|
|
2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-aarch64.texi: Add a "compnum" entry.
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_features): Likewise,
|
|
|
|
|
|
* testsuite/gas/aarch64/advsimd-compnum.s: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
|
|
|
|
|
|
|
2017-02-24 10:04:26 +01:00
|
|
|
|
2017-02-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/opcode.s: Add alternative TEST forms.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-opcode.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/opcode.d: Adjust accordingly.
|
|
|
|
|
|
* testsuite/gas/i386/opcode-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-opcode.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-opcode.d: Likewise.
|
|
|
|
|
|
|
2017-02-24 09:23:50 +01:00
|
|
|
|
2017-02-24 Sheldon Lobo <sheldon.lobo@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
Test cases for the architecture level aware SPARC ASI work.
|
|
|
|
|
|
* gas/testsuite/gas/sparc/sparc.exp: 2 new tests
|
|
|
|
|
|
* gas/testsuite/gas/sparc/asi-bump-warn.s: New test
|
|
|
|
|
|
* gas/testsuite/gas/sparc/asi-bump-warn.l: Likewise
|
|
|
|
|
|
* gas/testsuite/gas/sparc/asi-arch-error.s: Likewise
|
|
|
|
|
|
* gas/testsuite/gas/sparc/asi-arch-error.l: Likewise
|
|
|
|
|
|
|
2017-02-23 20:26:53 +01:00
|
|
|
|
2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/jalr4.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/jalr4-n32.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/jalr4-n64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/jalr4.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-02-23 16:49:37 +01:00
|
|
|
|
2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
Add support for associating SPARC ASIs with an architecture level.
|
|
|
|
|
|
* config/tc-sparc.c (parse_sparc_asi): New encode SPARC ASIs.
|
|
|
|
|
|
|
2017-02-23 11:21:10 +01:00
|
|
|
|
2017-02-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/err-sizeof.s: Don't use sums or differences
|
|
|
|
|
|
of symbols as expression.
|
|
|
|
|
|
|
|
|
|
|
|
2017-02-23 Jan Beulich <jbeulich@suse.com>
|
2017-02-23 11:00:44 +01:00
|
|
|
|
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-mpx-inval-2.d: Add 32- and 16-
|
|
|
|
|
|
bit GPR forms of BNDCL, BNDCU, and BNDCN. Add RSP-as-index
|
|
|
|
|
|
Intel syntax forms of BNDMK, BNDSTX, and BNDLDX.
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-mpx-inval-2.l: Adjust.
|
|
|
|
|
|
|
GAS: Consistently fix labels at the `.end' pseudo-op
Fix a functional regression with the `.end' pseudo-op, introduced with
commit ecb4347adecd ("Last take: approval for MIPS_STABS_ELF killing"),
<https://sourceware.org/ml/binutils/2002-06/msg00443.html>, and commit
dcd410fe1544 ("GNU as 2.14 on IRIX 6: crashes with shared libs"),
<https://sourceware.org/ml/binutils/2003-07/msg00415.html>, which caused
symbol values for labels placed between the end of a function's contents
and its terminating `.end' followed by one of the alignment pseudo-ops
to be different depending on whether either `-mdebug', or `-mno-pdr', or
neither of the command-line options is in effect, be it implied or
specified.
Given debug-label-end.s as follows and the `mips-linux' target we have:
$ cat debug-label-end.s
.text
.globl foo
.globl bar
.align 4, 0
.ent foo
foo:
nop
.aent bar
bar:
.insn
.end foo
.align 4, 0
.space 16
.globl baz
.ent baz
baz:
nop
.end baz
.align 4, 0
.space 16
$ as -o debug-label-end.o debug-label-end.s
$ readelf -s debug-label-end.o | grep bar
9: 00000004 0 FUNC GLOBAL DEFAULT 1 bar
$ as -mdebug -o debug-label-end.o debug-label-end.s
$ readelf -s debug-label-end.o | grep bar
9: 00000010 0 FUNC GLOBAL DEFAULT 1 bar
$ as -mno-pdr -o debug-label-end.o debug-label-end.s
$ readelf -s debug-label-end.o | grep bar
8: 00000010 0 FUNC GLOBAL DEFAULT 1 bar
$
The reason is the call to `md_flush_pending_output', which in the case
of `mips*-*-*' targets expands to `mips_emit_delays', which in turn
calls `mips_no_prev_insn', which calls `mips_clear_insn_labels', which
clears the list of outstanding labels. That list is in turn consulted
in `mips_align', called in the interpretation of alignment directives,
and the labels adjusted to the current location.
A call to `md_flush_pending_output' is only made from `s_mips_end' and
then only if `-mpdr' is in effect, which is the default for `*-*-linux*'
and some other `mips*-*-*' targets. A call to `md_flush_pending_output'
is never made from `ecoff_directive_end', which is used in place of
`s_mips_end' when `-mdebug' is in effect. Consequently if `-mno-pdr' or
`-mdebug' is in effect the list of outstanding labels makes it through
to any alignment directive that follows and the labels are differently
interpreted depending on the command-lines options used. And we want
code produced to be always the same.
Call `md_flush_pending_output' unconditionally then in `s_mips_end' and
add such a call from `ecoff_directive_end' as well, as long as the macro
is defined. While `ecoff_directive_end' is shared among targets, the
only one other than `mips*-*-*' actually using it is `alpha*-*-*' and it
does not define `md_flush_pending_output'. So the semantics isn't going
to change for it and neither it has to have its `s_alpha_end' updated
or have code in `ecoff_directive_end' conditionalized.
gas/
* ecoff.c (ecoff_directive_end) [md_flush_pending_output]: Call
`md_flush_pending_output'.
* config/tc-mips.c (s_mips_end) [md_flush_pending_output]: Call
`md_flush_pending_output' unconditionally.
* testsuite/gas/mips/debug-label-end-1.d: New test.
* testsuite/gas/mips/debug-label-end-2.d: New test.
* testsuite/gas/mips/debug-label-end-3.d: New test.
* testsuite/gas/mips/debug-label-end.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-02-17 21:30:55 +01:00
|
|
|
|
2017-02-22 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ecoff.c (ecoff_directive_end) [md_flush_pending_output]: Call
|
|
|
|
|
|
`md_flush_pending_output'.
|
|
|
|
|
|
* config/tc-mips.c (s_mips_end) [md_flush_pending_output]: Call
|
|
|
|
|
|
`md_flush_pending_output' unconditionally.
|
|
|
|
|
|
* testsuite/gas/mips/debug-label-end-1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/debug-label-end-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/debug-label-end-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/debug-label-end.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-02-22 14:17:33 +01:00
|
|
|
|
2017-02-22 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/err-sizeof.s: Include cris*-*-* in the list of
|
|
|
|
|
|
targets yielding an error message matching "too complex".
|
|
|
|
|
|
|
2017-02-22 12:57:49 +01:00
|
|
|
|
2017-02-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arm/vcmp-noprefix-imm.d: Skip for non-ELF targets.
|
|
|
|
|
|
|
2017-02-22 10:37:52 +01:00
|
|
|
|
2017-02-21 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* expr.c (operand): Handle missing operand to .startof.() and
|
|
|
|
|
|
.sizeof.().
|
|
|
|
|
|
* testsuite/gas/all/err-sizeof.s: New.
|
|
|
|
|
|
|
2017-02-20 02:36:52 +01:00
|
|
|
|
2017-02-20 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21118
|
|
|
|
|
|
* NEWS: Revise powerpc register check.
|
|
|
|
|
|
* config/tc-ppc.c (ppc_optimize_expr, md_assemble): Make "invalid
|
|
|
|
|
|
register expression" a warning.
|
|
|
|
|
|
|
GAS: Add ECOFF `.aent' pseudo-op support
Implement the ECOFF `.aent' pseudo-op for ECOFF-style `.mdebug' section
support with ELF objects and, for consistency, also with ECOFF objects.
This is so that the same MIPS source can be assembled without and with
`.mdebug' section generation enabled.
Taking the `gas/testsuite/gas/mips/aent.s' test case source as an
example and the `mips-linux' target we have:
$ as -o aent.o aent.s
$ as -mdebug -o aent.o aent.s
aent.s: Assembler messages:
aent.s:10: Error: unknown pseudo-op: `.aent'
$
because for the !ECOFF_DEBUGGING case (which is the default) the
pseudo-op is already handled by the MIPS backend with `s_mips_ent',
however no handler is present for the opposite case.
For the MIPS target this is a functional regression introduced with
commit ecb4347adecd ("Last take: approval for MIPS_STABS_ELF killing"),
<https://sourceware.org/ml/binutils/2002-06/msg00443.html>, where
support for the `.mdebug' section was added along with its associated
`-mdebug'/`-no-mdebug' command-line options, bringing an inconsistency
between the assembly syntax supported for each of these options as far
as the `.aent' pseudo-op is concerned.
Assembly language documentation available describes the pseudo-op
respectively as follows[1]:
"
.aent name, symno Sets an alternate entry point for the current
procedure. Use this information when you want
to generate information for the debugger. It must
appear inside an .ent/.end pair."
and[2]:
"
.aent name [,symno]
Sets an alternate entry point for the current procedure. Use this
information when you want to generate information for the debugger.
This directive must appear between a pair of .ent and .end directives.
(The optional symno is for compiler use only. It refers to a dense
number in a .T file (symbol table).)"
Copy the approach from `s_mips_ent' then and add `.aent' support to the
`.ent' pseudo-op handler shared between the ELF and ECOFF object file
format backends, by setting BSF_FUNCTION for the symbol requested.
References:
[1] "MIPSpro Assembly Language Programmer's Guide", Silicon Graphics,
Inc., Document Number 007-2418-004, Section 8.1 "Op-Codes", p. 96
<http://techpubs.sgi.com/library/manuals/2000/007-2418-004/pdf/007-2418-004.pdf>
[2] "Digital UNIX Assembly Language Programmer's Guide", Digital
Equipment Corporation, Order Number: AA-PS31D-TE, March 1996,
Chapter 5 "Assembler Directives", p. 5-2
<http://h41361.www4.hpe.com/docs/base_doc/DOCUMENTATION/V40G_PDF/APS31DTE.PDF>
gas/
* ecoff.c (ecoff_directive_ent, add_procedure): Handle `.aent'.
* config/obj-ecoff.c (obj_pseudo_table): Add "aent" entry.
* config/obj-elf.c (ecoff_debug_pseudo_table): Likewise.
* testsuite/gas/mips/aent-2.d: New test.
* testsuite/gas/mips/aent-mdebug.d: New test.
* testsuite/gas/mips/aent-mdebug-2.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-02-16 02:50:29 +01:00
|
|
|
|
2017-02-17 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ecoff.c (ecoff_directive_ent, add_procedure): Handle `.aent'.
|
|
|
|
|
|
* config/obj-ecoff.c (obj_pseudo_table): Add "aent" entry.
|
|
|
|
|
|
* config/obj-elf.c (ecoff_debug_pseudo_table): Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/aent-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/aent-mdebug.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/aent-mdebug-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-02-15 17:54:21 +01:00
|
|
|
|
2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/sve-sysreg.s,
|
|
|
|
|
|
testsuite/gas/aarch64/sve-sysreg.d,
|
|
|
|
|
|
testsuite/gas/aarch64/sve-sysreg-invalid.d,
|
|
|
|
|
|
testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests.
|
|
|
|
|
|
|
2017-02-15 17:51:17 +01:00
|
|
|
|
2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-aarch64.texi: Fix sve entry.
|
|
|
|
|
|
|
2017-02-15 11:57:51 +01:00
|
|
|
|
2017-02-15 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arc.c (md_convert_frag): Remove @pcl relocation
|
|
|
|
|
|
information from input expression.
|
|
|
|
|
|
(assemble_insn): Make sure pcrel is correctly set.
|
|
|
|
|
|
(arc_pcrel_adjust): Compensate for PCL rounding.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add01.d: New file.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add01.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add02.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add02.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add03.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add03.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add04.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-add04.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-ld01.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-ld01.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-ld02.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-ld02.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mov01.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mov01.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mov02.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mov02.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mpy01.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-mpy01.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub01.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub01.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub02.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub02.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub03.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub03.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub04.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relax-sub04.s: Likewise.
|
|
|
|
|
|
|
2017-02-15 09:52:53 +01:00
|
|
|
|
2017-02-09 Vineet Gupta <vgupta@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arc/st.d: Update for 0xe having a name now
|
|
|
|
|
|
|
2017-02-14 11:08:21 +01:00
|
|
|
|
2017-02-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21118
|
|
|
|
|
|
* NEWS: Mention powerpc register checks.
|
|
|
|
|
|
* config/tc-ppc.c (struct pd_reg): Make value a short. Add flags.
|
|
|
|
|
|
(pre_defined_registers): Delete fpscr and pmr entries. Set
|
|
|
|
|
|
register type in flags.
|
|
|
|
|
|
(cr_names): Set type in flags.
|
|
|
|
|
|
(reg_name_search): Return pointer to struct pd_reg rather than value.
|
|
|
|
|
|
(register_name): Adjust to suit. Set X_md from flags.
|
|
|
|
|
|
(ppc_parse_name): Likewise.
|
|
|
|
|
|
(ppc_optimize_expr): New function.
|
|
|
|
|
|
(md_assemble): Verify expresion reg flags match operand.
|
|
|
|
|
|
* config/tc-ppc.h (md_optimize_expr): Define.
|
|
|
|
|
|
(ppc_optimize_expr): Declare.
|
|
|
|
|
|
|
2017-02-14 11:00:27 +01:00
|
|
|
|
2017-02-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/cell.s: Correct invalid registers.
|
|
|
|
|
|
* testsuite/gas/ppc/vle-simple-1.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/vle-simple-2.s: Likewise.
|
|
|
|
|
|
|
2017-02-13 18:46:59 +01:00
|
|
|
|
2017-02-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (parse_ifimm_zero): Make prefix optional in unified
|
|
|
|
|
|
syntax.
|
|
|
|
|
|
* testsuite/gas/arm/vcmp-noprefix-imm.d: New file.
|
|
|
|
|
|
* testsuite/gas/arm/vcmp-noprefix-imm.s: New file.
|
|
|
|
|
|
|
2017-02-10 05:18:23 +01:00
|
|
|
|
2017-02-10 Nicholas Piggin <npiggin@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/power9.d <scv, rfscv>: New tests.
|
|
|
|
|
|
|
2017-02-02 17:23:21 +01:00
|
|
|
|
2017-02-02 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Overview): Select MIPS options for man page
|
|
|
|
|
|
inclusion.
|
|
|
|
|
|
|
2017-01-30 18:11:22 +01:00
|
|
|
|
2017-01-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ignore_branch_isa): New variable.
|
|
|
|
|
|
(options): Add OPTION_IGNORE_BRANCH_ISA and
|
|
|
|
|
|
OPTION_NO_IGNORE_BRANCH_ISA enum values.
|
|
|
|
|
|
(md_longopts): Add "mignore-branch-isa" and
|
|
|
|
|
|
"mno-ignore-branch-isa" options.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
|
|
|
|
|
|
OPTION_NO_IGNORE_BRANCH_ISA.
|
|
|
|
|
|
(fix_bad_cross_mode_branch_p): Return FALSE if
|
|
|
|
|
|
`mips_ignore_branch_isa' has been set.
|
|
|
|
|
|
(md_show_usage): Add `-mignore-branch-isa' and
|
|
|
|
|
|
`-mno-ignore-branch-isa'.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Target MIPS options): Add
|
|
|
|
|
|
`-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
|
|
|
|
|
|
(-mignore-branch-isa, -mno-ignore-branch-isa): New options.
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
|
|
|
|
|
|
`-mno-ignore-branch-isa' options.
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2017-01-30 18:10:31 +01:00
|
|
|
|
2017-01-30 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n32-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-local-n64-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Fold corresponding list tests
|
|
|
|
|
|
into the new tests.
|
|
|
|
|
|
|
2017-01-27 13:00:55 +01:00
|
|
|
|
2017-01-27 Alexis Deruell <alexis.deruelle@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21056
|
|
|
|
|
|
* testsuite/gas/tic6x/insns16-parallel.s: New test case.
|
|
|
|
|
|
* testsuite/gas/tic6x/insns16-parallel.d: New test driver.
|
|
|
|
|
|
|
2017-01-25 08:24:47 +01:00
|
|
|
|
2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt (aarch64*-*-rtems*): Remove.
|
|
|
|
|
|
(bfin-*-rtems*): Likewise.
|
|
|
|
|
|
(h8300-*-rtems*): Likewise.
|
|
|
|
|
|
(i386-*-rtems*): Likewise.
|
|
|
|
|
|
(m32c-*-rtems*): Likewise.
|
|
|
|
|
|
(m32r-*-rtems*): Likewise.
|
|
|
|
|
|
(m68k-*-rtems*): Likewise.
|
|
|
|
|
|
(mips-*-rtems*): Likewise.
|
|
|
|
|
|
(nios2-*-rtems*): Likewise.
|
|
|
|
|
|
(ppc-*-rtems*): Likewise.
|
|
|
|
|
|
(sh-*-rtems*): Likewise.
|
|
|
|
|
|
(sparc64-*-rtems*): Likewise.
|
|
|
|
|
|
(sparc-*-rtems*): Likewise.
|
|
|
|
|
|
(*-*-rtems*) Use ELF format.
|
|
|
|
|
|
|
2017-01-25 08:23:44 +01:00
|
|
|
|
2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt (arm-*-rtems*): Move to (arm-*-eabi*).
|
|
|
|
|
|
|
2017-01-25 08:22:27 +01:00
|
|
|
|
2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt (sh-*-rtemscoff*): Remove.
|
|
|
|
|
|
|
2017-01-19 09:10:51 +01:00
|
|
|
|
2017-01-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt (riscv*-*-*): Remove em=linux.
|
|
|
|
|
|
|
2017-01-23 16:23:07 +01:00
|
|
|
|
2017-01-23 Sebastian Rasmussen <sebras@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/21072
|
|
|
|
|
|
* asintl.h: Fix spelling mistakes and typos.
|
|
|
|
|
|
* atof-generic.c: Likewise.
|
|
|
|
|
|
* bit_fix.h: Likewise.
|
|
|
|
|
|
* config/atof-ieee.c: Likewise.
|
|
|
|
|
|
* config/bfin-defs.h: Likewise.
|
|
|
|
|
|
* config/bfin-parse.y: Likewise.
|
|
|
|
|
|
* config/obj-coff-seh.h: Likewise.
|
|
|
|
|
|
* config/obj-coff.c: Likewise.
|
|
|
|
|
|
* config/obj-evax.c: Likewise.
|
|
|
|
|
|
* config/obj-macho.c: Likewise.
|
|
|
|
|
|
* config/rx-parse.y: Likewise.
|
|
|
|
|
|
* config/tc-aarch64.c: Likewise.
|
|
|
|
|
|
* config/tc-alpha.c: Likewise.
|
|
|
|
|
|
* config/tc-arc.c: Likewise.
|
|
|
|
|
|
* config/tc-arm.c: Likewise.
|
|
|
|
|
|
* config/tc-avr.c: Likewise.
|
|
|
|
|
|
* config/tc-bfin.c: Likewise.
|
|
|
|
|
|
* config/tc-cr16.c: Likewise.
|
|
|
|
|
|
* config/tc-cris.c: Likewise.
|
|
|
|
|
|
* config/tc-crx.c: Likewise.
|
|
|
|
|
|
* config/tc-d10v.c: Likewise.
|
|
|
|
|
|
* config/tc-d30v.c: Likewise.
|
|
|
|
|
|
* config/tc-dlx.c: Likewise.
|
|
|
|
|
|
* config/tc-epiphany.c: Likewise.
|
|
|
|
|
|
* config/tc-frv.c: Likewise.
|
|
|
|
|
|
* config/tc-hppa.c: Likewise.
|
|
|
|
|
|
* config/tc-i370.c: Likewise.
|
|
|
|
|
|
* config/tc-i386-intel.c: Likewise.
|
|
|
|
|
|
* config/tc-i386.c: Likewise.
|
|
|
|
|
|
* config/tc-i960.c: Likewise.
|
|
|
|
|
|
* config/tc-ia64.c: Likewise.
|
|
|
|
|
|
* config/tc-m32r.c: Likewise.
|
|
|
|
|
|
* config/tc-m68hc11.c: Likewise.
|
|
|
|
|
|
* config/tc-m68k.c: Likewise.
|
|
|
|
|
|
* config/tc-mcore.c: Likewise.
|
|
|
|
|
|
* config/tc-mep.c: Likewise.
|
|
|
|
|
|
* config/tc-mep.h: Likewise.
|
|
|
|
|
|
* config/tc-metag.c: Likewise.
|
|
|
|
|
|
* config/tc-microblaze.c: Likewise.
|
|
|
|
|
|
* config/tc-mips.c: Likewise.
|
|
|
|
|
|
* config/tc-mmix.c: Likewise.
|
|
|
|
|
|
* config/tc-mn10200.c: Likewise.
|
|
|
|
|
|
* config/tc-mn10300.c: Likewise.
|
|
|
|
|
|
* config/tc-msp430.c: Likewise.
|
|
|
|
|
|
* config/tc-msp430.h: Likewise.
|
|
|
|
|
|
* config/tc-nds32.c: Likewise.
|
|
|
|
|
|
* config/tc-nds32.h: Likewise.
|
|
|
|
|
|
* config/tc-nios2.c: Likewise.
|
|
|
|
|
|
* config/tc-nios2.h: Likewise.
|
|
|
|
|
|
* config/tc-ns32k.c: Likewise.
|
|
|
|
|
|
* config/tc-pdp11.c: Likewise.
|
|
|
|
|
|
* config/tc-ppc.c: Likewise.
|
|
|
|
|
|
* config/tc-pru.c: Likewise.
|
|
|
|
|
|
* config/tc-rx.c: Likewise.
|
|
|
|
|
|
* config/tc-s390.c: Likewise.
|
|
|
|
|
|
* config/tc-score.c: Likewise.
|
|
|
|
|
|
* config/tc-score7.c: Likewise.
|
|
|
|
|
|
* config/tc-sh.c: Likewise.
|
|
|
|
|
|
* config/tc-sh64.c: Likewise.
|
|
|
|
|
|
* config/tc-sparc.c: Likewise.
|
|
|
|
|
|
* config/tc-tic4x.c: Likewise.
|
|
|
|
|
|
* config/tc-tic54x.c: Likewise.
|
|
|
|
|
|
* config/tc-v850.c: Likewise.
|
|
|
|
|
|
* config/tc-vax.c: Likewise.
|
|
|
|
|
|
* config/tc-visium.c: Likewise.
|
|
|
|
|
|
* config/tc-xgate.c: Likewise.
|
|
|
|
|
|
* config/tc-xtensa.c: Likewise.
|
|
|
|
|
|
* config/tc-z80.c: Likewise.
|
|
|
|
|
|
* config/tc-z8k.c: Likewise.
|
|
|
|
|
|
* config/te-vms.c: Likewise.
|
|
|
|
|
|
* config/xtensa-relax.c: Likewise.
|
|
|
|
|
|
* doc/as.texinfo: Likewise.
|
|
|
|
|
|
* doc/c-arm.texi: Likewise.
|
|
|
|
|
|
* doc/c-hppa.texi: Likewise.
|
|
|
|
|
|
* doc/c-i370.texi: Likewise.
|
|
|
|
|
|
* doc/c-i386.texi: Likewise.
|
|
|
|
|
|
* doc/c-m32r.texi: Likewise.
|
|
|
|
|
|
* doc/c-m68k.texi: Likewise.
|
|
|
|
|
|
* doc/c-mmix.texi: Likewise.
|
|
|
|
|
|
* doc/c-msp430.texi: Likewise.
|
|
|
|
|
|
* doc/c-nds32.texi: Likewise.
|
|
|
|
|
|
* doc/c-ns32k.texi: Likewise.
|
|
|
|
|
|
* doc/c-riscv.texi: Likewise.
|
|
|
|
|
|
* doc/c-rx.texi: Likewise.
|
|
|
|
|
|
* doc/c-s390.texi: Likewise.
|
|
|
|
|
|
* doc/c-tic6x.texi: Likewise.
|
|
|
|
|
|
* doc/c-tilegx.texi: Likewise.
|
|
|
|
|
|
* doc/c-tilepro.texi: Likewise.
|
|
|
|
|
|
* doc/c-v850.texi: Likewise.
|
|
|
|
|
|
* doc/c-xgate.texi: Likewise.
|
|
|
|
|
|
* doc/c-xtensa.texi: Likewise.
|
|
|
|
|
|
* dwarf2dbg.c: Likewise.
|
|
|
|
|
|
* ecoff.c: Likewise.
|
|
|
|
|
|
* itbl-ops.c: Likewise.
|
|
|
|
|
|
* listing.c: Likewise.
|
|
|
|
|
|
* macro.c: Likewise.
|
|
|
|
|
|
* po/gas.pot: Likewise.
|
|
|
|
|
|
* read.c: Likewise.
|
|
|
|
|
|
* struc-symbol.h: Likewise.
|
|
|
|
|
|
* symbols.h: Likewise.
|
|
|
|
|
|
* testsuite/gas/arc/relocs-errors.err: Likewise.
|
|
|
|
|
|
* write.c: Likewise.
|
|
|
|
|
|
|
2017-01-23 14:32:12 +01:00
|
|
|
|
2017-01-23 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
|
2017-01-20 11:32:25 +01:00
|
|
|
|
2017-01-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_operands): Check for operand overflow
|
|
|
|
|
|
before setting the unspecified bit.
|
|
|
|
|
|
|
PR gas/20649: MIPS: Fix GOT16/LO16 reloc pairing with comdat sections
Correct a regression from commit 8614eeee67f9 ("Traditional MIPS
patches"), <https://sourceware.org/ml/binutils/2000-07/msg00018.html>,
which caused symbols in linkonce or what is these days known as comdat
sections to be treated as external for the purpose of PIC relocation
generation even if their binding remains STB_LOCAL. This in turn
disabled GOT16/LO16 relocation pairing with references to such symbols,
as no complementing LO16 relocation is expected for external GOT16
references in the o32 ABI, which ultimately leads to link errors, e.g.:
ld: comdat-reloc.o: Can't find matching LO16 reloc against `foo' for R_MIPS_GOT16 at 0x24 in section `.text.bar[bar]'
as with the LD test case included with this change.
Revert the special case for symbols in comdat sections then, making code
actually match `adjust_reloc_syms' as indicated in its explanatory
comment, and adjust calling code accordingly. Also bring back the
corresponding description of what now is `s_is_linkonce', lost with
commit 5f0fe04bc550 ("Improved MIPS16/MIPS32 code intermixing for
gas."), <https://www.sourceware.org/ml/binutils/2006-07/msg00039.html>.
gas/
PR gas/20649
* config/tc-mips.c (pic_need_relax): Don't check for linkonce
symbols, remove the `segtype' parameter.
(mips_frob_file, md_estimate_size_before_relax): Adjust
accordingly.
(s_is_linkonce): Add an explanatory comment.
* testsuite/gas/mips/comdat-reloc.d: New test.
* testsuite/gas/mips/comdat-reloc.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
ld/
PR gas/20649
* testsuite/ld-mips-elf/mips-elf.exp: Add PIC comdat GOT16/LO16
relocation pairing link test.
2017-01-18 19:18:21 +01:00
|
|
|
|
2017-01-18 Maciej W. Rozycki <macro@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/20649
|
|
|
|
|
|
* config/tc-mips.c (pic_need_relax): Don't check for linkonce
|
|
|
|
|
|
symbols, remove the `segtype' parameter.
|
|
|
|
|
|
(mips_frob_file, md_estimate_size_before_relax): Adjust
|
|
|
|
|
|
accordingly.
|
|
|
|
|
|
(s_is_linkonce): Add an explanatory comment.
|
|
|
|
|
|
* testsuite/gas/mips/comdat-reloc.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/comdat-reloc.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
|
2017-01-18 18:08:34 +01:00
|
|
|
|
2017-01-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/arm/armv8_3-a-simd.s: Add vcmla tests.
|
|
|
|
|
|
* testsuite/gas/arm/armv8_3-a-simd.d: Update.
|
|
|
|
|
|
|
2017-01-18 14:38:27 +01:00
|
|
|
|
2017-01-18 Bernhard Rosenkranzer <bero@lindev.ch>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21059
|
|
|
|
|
|
* config/bfin-lex.l: Support processing with flex 2.6.3.
|
|
|
|
|
|
* itbl-lex.l: Likewise.
|
|
|
|
|
|
|
2017-01-18 14:23:10 +01:00
|
|
|
|
2017-01-18 Nathan Sidwell <nathan@acm.org>
|
|
|
|
|
|
|
|
|
|
|
|
* as.h (gas_assert): Use abort.
|
|
|
|
|
|
(as_assert): Remove.
|
|
|
|
|
|
(signal_init): Declare.
|
|
|
|
|
|
* as.c (main): Call signal_init.
|
|
|
|
|
|
* messages.c: #include <signal.h>
|
|
|
|
|
|
(as_assert): Delete.
|
|
|
|
|
|
(as_abort): Allow NULL FILE.
|
|
|
|
|
|
(signal_crash): New.
|
|
|
|
|
|
(signal_init): Register fatal signal handlers.
|
|
|
|
|
|
* configure.ac: Check for strsignal.
|
|
|
|
|
|
* config.in: Rebuilt.
|
|
|
|
|
|
* configure: Rebuilt.
|
|
|
|
|
|
|
2017-01-18 12:35:29 +01:00
|
|
|
|
2017-01-17 Nick Clifton <nickc@redhat.com>
|
2017-01-16 11:59:23 +01:00
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
|
2017-01-12 17:42:17 +01:00
|
|
|
|
2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .avx512_vpopcntdq.
|
|
|
|
|
|
(cpu_noarch): Add noavx512_vpopcntdq.
|
|
|
|
|
|
* doc/c-i386.texi: Document avx512_vpopcntdq, noavx512_vpopcntdq.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run AVX512_VPOPCNTDQ tests.
|
|
|
|
|
|
* testsuite/gas/i386/avx512_vpopcntdqd-intel.d: New file.
|
|
|
|
|
|
* testsuite/gas/i386/avx512_vpopcntdqd.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/avx512_vpopcntdqd.s: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512_vpopcntdqd-intel.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512_vpopcntdqd.d: Ditto.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx512_vpopcntdqd.s: Ditto.
|
|
|
|
|
|
|
2017-01-12 15:56:13 +01:00
|
|
|
|
2017-01-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (temp_ilp): New function. Installs a temporary input
|
|
|
|
|
|
line pointer.
|
|
|
|
|
|
(restore_ilp): New function. Restores the original input line
|
|
|
|
|
|
pointer.
|
|
|
|
|
|
* read.h (temp_ilp): Prototype.
|
|
|
|
|
|
(restore_ilp): Prototype.
|
|
|
|
|
|
* stabs.c (dot_func_p): Use bfd_boolean type.
|
|
|
|
|
|
(generate_asm_file): Use temp_ilp and restore_ilp.
|
|
|
|
|
|
(stabs_generate_asm_lineno): Likewise.
|
|
|
|
|
|
(stabs_generate_asm_endfunc): Likewise.
|
|
|
|
|
|
|
2017-01-11 16:05:53 +01:00
|
|
|
|
2017-01-11 Jeremy Soller <jackpot51@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add entry for i386-redox.
|
|
|
|
|
|
|
2017-01-10 12:28:36 +01:00
|
|
|
|
2017-01-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
|
2017-01-10 14:43:01 +01:00
|
|
|
|
2017-01-10 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/sleb128-8.d: Adjust test.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp (test_cond): Likewise.
|
|
|
|
|
|
|
2017-01-09 15:50:32 +01:00
|
|
|
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2017-01-10 Tristan Gingold <gingold@adacore.com>
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* read.c (emit_leb128_expr): Extended unsigned big number for
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sleb128.
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* testsuite/gas/all/gas.exp (test_cond): Add sleb128-8 test.
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* testsuite/gas/all/sleb128.d: New test.
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* testsuite/gas/all/sleb128.s: New test source.
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2016-12-22 03:05:28 +01:00
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2017-01-09 Andrew Waterman <andrew@sifive.com>
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* config/tc-riscv.c (append_insn): Don't eagerly apply relocations
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against constants.
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(md_apply_fix): Mark relocations against constants as "done."
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2016-12-21 21:47:13 +01:00
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2017-01-09 Andrew Waterman <andrew@sifive.com>
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* config/tc-riscv.c (append_insn): Don't eagerly apply relocations
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against constants.
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(md_apply_fix): Mark relocations against constants as "done."
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2016-12-30 02:29:53 +01:00
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2017-01-09 Palmer Dabbelt <palmer@dabbelt.com>
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Kito Cheng <kito.cheng@gmail.com>
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* emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS):
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Removed.
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(SDATA_START_SYMBOLS): Likewise.
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2017-01-09 11:11:50 +01:00
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2017-01-09 Nick Clifton <nickc@redhat.com>
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* po/sv.po: New Swedish translation.
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* configure.ac (ALL_LINGUAS): Add sv.
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* configure: Regenerate.
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2017-01-09 10:22:33 +01:00
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2017-01-09 Andrew Waterman <andrew@sifive.com>
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* config/tc-riscv.c (relaxed_branch_length): Use the long
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sequence when the target is a weak symbol.
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2017-01-04 13:27:10 +01:00
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2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* config/tc-aarch64.c (aarch64_features): Add rcpc.
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* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
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* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ...
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* testsuite/gas/aarch64/ldst-rcpc.d: This.
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* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ...
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* testsuite/gas/aarch64/ldst-rcpc.s: This.
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* testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
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2017-01-04 12:49:00 +01:00
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2017-01-04 Norm Jacobs <norm.jacobs@oracle.com>
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PR gas/20992
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* configure.tgt: Treat sparcv9 as sparc64.
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|
2017-01-03 18:42:01 +01:00
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2017-01-03 Kito Cheng <kito.cheng@gmail.com>
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* config/tc-riscv.c (riscv_set_arch): Whitelist the "q" ISA
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extension.
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(riscv_after_parse_args): Set FLOAT_ABI_QUAD when the Q ISA is
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|
enabled and no other ABI is specified.
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|
2017-01-02 17:20:21 +01:00
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2017-01-03 Dimitar Dimitrov <dimitar@dinux.eu>
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* config/tc-pru.c (md_number_to_chars): Fix parameter to be
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|
valueT, as declared in tc.h.
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|
(md_apply_fix): Fix to work on 32-bit hosts.
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|
2017-01-02 04:36:43 +01:00
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|
2017-01-02 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2017-01-02 04:25:05 +01:00
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For older changes see ChangeLog-2016
|
2016-01-01 11:44:31 +01:00
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2017-01-02 04:25:05 +01:00
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|
Copyright (C) 2017 Free Software Foundation, Inc.
|
2016-01-01 11:44:31 +01:00
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Copying and distribution of this file, with or without modification,
|
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|
are permitted in any medium without royalty provided the copyright
|
|
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|
|
notice and this notice are preserved.
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|
Local Variables:
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|
mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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